1 Montgomery Modular Multiplication in Hard- ware

FEI KEMT
On case of Actel FPGAs we explained the way how the basic parameters of the
TRNG can be computed and what is the relation between them and target device
parameters. Following the presented results it is possible to implement the TRNG
with required parameters. We can conclude that Actel FPGAs are suitable for
implementation of the TRNG based on discussed method, and achieved parameters
are comparable with the ones from Altera FPGAs.
6.2.4 Stochastic Model of PLL-TRNG
It is a common requirement that a good TRNG design should be supported by a
mathematical (more precisely stochastic) model of the source of randomness. A
reliable model is a necessary requirement for the security evaluation during the
certification process [37]. On one hand, the model should be as simple as possible,
but on the other hand, it should also reliably describe a basic behavior of the TRNG.
In our case, the stochastic model should express the probability that the value on
the generator output is equal to one as a function of the jitter variation and the
phase of the CLK and CLJ signals.
Reordering of the Samples If sampled values of the signal CLJ are ordered in
a proper way, they create an image of the original clock waveform. If we accumulate
the ordered samples in KD accumulators during Q periods TQ, we obtain an image
of the distribution of the probabilities where the i-th sample is equal to one.
The Figure 6 – 5 presents an example of accumulated and reordered samples
obtained during Q = 1000 periods TQ for these parameters:
• KM = 212, KD = 207, FCLJ = 81.93 MHz presented at Figure 6 – 5(a)) and
• KM = 516, KD = 175, FCLJ = 491.43 MHz at Figure 6 – 5(b)).
The variation of the jitter is proportional to the number of points (critical sam-
ples) in the rising (or falling) region of the waveforms (two and six in the pre-
sented example). Since in (b) FCLJ = 491.43 MHz, the period TCLJ is divided into
KD = 175 sampling intervals, the distance between two subsequent samples is equal
to about 11.6 ps. The width of the region influenced by the jitter is thus about
69.6 ps. This value is equal to approximately 3σjit, so the σjit ∼ 23.2 ps. Using the
same method, we can get σjit ∼ 29.5 ps from Figure 6 – 5(a). It is clear that the
presented method of the jitter measurement is sufficiently simple to be implemented
inside a device and the jitter can thus be monitored continuously in real time.
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