1 Montgomery Modular Multiplication in Hard- ware

FEI KEMT
Nios processor that is powerful enough to control the process and reduces the
resources usage to reasonable 1275 LEs.
The MMM coprocessor is based on a 16-bit (w = 16) CSA PE with 6 (n = 6)
pipelined stages and occupies 1290 LEs. The total area occupation of the
second, mixed hardware-software solution is comparable to the purely software
solution. The processor has been clocked at 50 MHz and the MMM coprocessor
at 150 MHz. Times necessary for MMM and squaring are presented in Table 2 –
6.
Table 2 – 6 Execution times of mixed hardware-software implementation of MMM on Altera Nios
development board (with APEX EP20K200) for the CSA PE
Length Method Multiplication Squaring
(e × w) (ms) (ms)
1024 = 64 × 16 MWR2MM CSA 0.073 0.073
2048 = 128 × 16 MWR2MM CSA 0.291 0.291
3. The third design we analyse is based on the same system architecture as the
one introduced in the second point. This time the MMM coprocessor includes
the 16-bit (w = 16) CPA PE with 9 (n = 9) pipelined stages. The parameters
were chosen with purpose to get the occupied area size comparable to the
other two design variations. The processor has been clocked at 50 MHz and
the MMM coprocessor at 100 MHz. The results obtained for this configuration
are presented in Table 2 – 7.
Table 2 – 7 Execution times of mixed hardware-software implementation of the MMM on Altera
Nios development board (with APEX EP20K200) for the CPA PE
Length Method Multiplication Squaring
(e × w) (ms) (ms)
1024 = 64 × 16 MWR2MM CPA 0.069 0.069
2048 = 128 × 16 MWR2MM CPA 0.278 0.278
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