1 Montgomery Modular Multiplication in Hard- ware

More documents

Recommendations

Info

FEI KEMT [46] Drutarovský, M., Fischer, V., and ˇ Simka, M. Comparison of Two Implementations of Scalable Montgomery Coprocessor Embedded in Reconfig- urable Hardware. In Proceedings of the XIX Conference on Design of Circuits and Integrated Systems – DCIS 2004 (Bordeaux, France, Nov. 24–26, 2004), pp. 240–245. [47] Drutarovský, M., Fischer, V., ˇ Simka, M., and Celle, F. A Simple PLL-based True Random Number Generator for Embedded Digital Systems. Computing and Informatics 23, 5 (2004), 501–515. [48] Drutarovský, M., and ˇ Simka, M. Cryptographic True Random Number Generator for Embedded Nios Processor. In Proceedings of 13th International Czech-Slovak Scientific Conference Radioelektronika (Brno, Czech Republic, May 6–7, 2003), pp. 268–371. [49] Drutarovský, M., and ˇ Simka, M. Custom FPGA Cryptographic Blocks for Reconfigurable Embedded NIOS Processor. Acta Electrotechnica et Infor- matica 4, 2 (2004), 33–39. [50] Drutarovský, M., ˇ Simka, M., and Fischer, V. Comparison of Scalable Montgomery Modular Multiplications Embedded in Reconfigurable Hardware. Acta Electrotechnica et Informatica 6, 2 (2006), 37–45. [51] Eldridge, S. E., and Walter, C. D. Hardware implementation of Mont- gomery’s modular multiplication algorithm. IEEE Trans. Comput. 42, 6 (1993), 693–699. [52] Epstein, M., Hars, L., Krasinski, R., Rosner, M., and Zheng, H. Design and implementation of a true random number generator based on digital circuit artifacts. In Workshop on Cryptographic Hardware and Embedded Systems – CHES 2003 (Berlin, Germany, Sept. 8–10, 2003), C. D. Walter, Ç. K. Koç, and C. Paar, Eds., vol. 2779 of Lecture Notes in Computer Science, Springer-Verlag, pp. 152–165. [53] Fairfield, R. C., Mortenson, R. L., and Coulthart, K. B. An LSI random number generator (RNG). In Proceedings of CRYPTO 84 on Advances in cryptology (1985), Springer-Verlag New York, Inc., pp. 203–230. 131
FEI KEMT [54] Federal Information Processing Standards, National Institute of Standards and Technology, U.S. Department of Commerce. Data Encryption Standard, Jan. 1977. NIST FIPS PUB 46. [55] Federal Information Processing Standards, National Institute of Standards and Technology, U.S. Department of Commerce. Data Encryption Standard, Oct. 1999. NIST FIPS PUB 46-3. [56] Federal Information Processing Standards, National Institute of Standards and Technology, U.S. Department of Commerce. Specification for the Digital Signature Standard, Jan. 2000. NIST FIPS PUB 186-2. [57] Federal Information Processing Standards, National Institute of Standards and Technology, U.S. Department of Commerce. Security Requirements for Cryptographic Modules, May 2001. NIST FIPS PUB 140-2. [58] Federal Information Processing Standards, National Institute of Standards and Technology, U.S. Department of Commerce. Specification for the Advanced Encryption Standard (AES), 2001. NIST FIPS PUB 197. [59] Federal Information Processing Standards, National Institute of Standards and Technology, U.S. Department of Commerce. Specification for the Secure Hash Standard, Aug. 2002. NIST FIPS PUB 180-2 + change notice to include SHA-224. [60] Fischer, V., and Drutarovský, M. True random number generator embedded in reconfigurable hardware. In Workshop on Cryptographic Hardware and Embedded Systems – CHES 2002 (Berlin, Germany, Aug.13–15, 2002), B. S. Kaliski, Jr., Ç. K. Koç, and C. Paar, Eds., vol. 2523 of Lecture Notes in Computer Science, Springer-Verlag, pp. 415–430. [61] Fischer, V., Drutarovský, M., ˇ Simka, M., and Bochard, N. High Performance True Random Number Generator in Altera Stratix FPLDs. In Field-Programmable Logic and Applications – FPL 2004 (Lueven, Belgium, Aug. 2004), J. Becker, M. Platzner, and S. Vernalde, Eds., vol. 3203 of Lecture Notes in Computer Science, Springer-Verlag, pp. 555–564. 132
Page 1 and 2:
Technical University of Koˇsice Fa
Page 3 and 4:
Metadata Sheet Author: Martin ˇ Si
Page 5 and 6:
FEI KEMT ciel’ovej platformy a vl
Page 7 and 8:
Acknowledgement There are several p
Page 9 and 10:
Contents Introduction 1 1 Montgomer
Page 11 and 12:
FEI KEMT 6.2.3 Analysis of TRNG in
Page 13 and 14:
FEI KEMT 6 - 2 Block diagram of dig
Page 15 and 16:
List of Algorithms 1 - 1 Montgomery
Page 17 and 18:
FEI KEMT π(p) prime counting funct
Page 19 and 20:
FEI KEMT MWR2MM Multiple Word Radix
Page 21 and 22:
FEI KEMT and Elliptic Curve Cryptog
Page 23 and 24:
FEI KEMT The hardware implementatio
Page 25 and 26:
FEI KEMT data inputs clock Look-up
Page 27 and 28:
FEI KEMT A (X) request for B’s pr
Page 29 and 30:
FEI KEMT Algorithm 1 - 1 Montgomery
Page 31 and 32:
FEI KEMT In the Algorithm 1 - 1 the
Page 33 and 34:
FEI KEMT by the radix b changes to
Page 35 and 36:
FEI KEMT the ECC instead of the RSA
Page 37 and 38:
FEI KEMT Algorithm 1 - 5 Key genera
Page 39 and 40:
FEI KEMT 2 Montgomery Modular Multi
Page 41 and 42:
FEI KEMT not significant. On the ot
Page 43 and 44:
FEI KEMT Algorithm 2 - 2 The multip
Page 45 and 46:
FEI KEMT Beside the internal struct
Page 47 and 48:
FEI KEMT q x i S (j) 2 w-1 S (j) 1
Page 49 and 50:
FEI KEMT x i x i-1 xi-n+1 Y (j) M (
Page 51 and 52:
FEI KEMT especially if the access t
Page 53 and 54:
FEI KEMT 2.2.3 Interface to Control
Page 55 and 56:
FEI KEMT Clock Signal Distribution
Page 57 and 58:
FEI KEMT 2.3.2 Montgomery Multiplic
Page 59 and 60:
FEI KEMT 1. Fully software solution
Page 61 and 62:
FEI KEMT 2.3.4 Implementation Resul
Page 63 and 64:
FEI KEMT 3 Elliptic Curve Method in
Page 65 and 66:
FEI KEMT improving the area-time pr
Page 67 and 68:
FEI KEMT 3.3.1 Pollard’s (p − 1
Page 69 and 70:
FEI KEMT If the order of P ∈ E(Fq
Page 71 and 72:
FEI KEMT handicap of the Montgomery
Page 73 and 74:
FEI KEMT Two major improvements hav
Page 75 and 76:
FEI KEMT and case study with GNFS b
Page 77 and 78:
FEI KEMT Table 4 - 1 Computational
Page 79 and 80:
FEI KEMT from or writing to a singl
Page 81 and 82:
FEI KEMT Algorithm 4 - 1 Modified M
Page 83 and 84:
FEI KEMT Algorithm 4 - 2 Modular ad
Page 85 and 86:
FEI KEMT microprocessor, e.g. Alter
Page 87 and 88:
FEI KEMT timings of ECM implementat
Page 89 and 90:
FEI KEMT hardware was implemented o
Page 91 and 92:
FEI KEMT [68] what can be expressed
Page 93 and 94:
FEI KEMT and a harvesting mechanism
Page 95 and 96:
FEI KEMT control also all the syste
Page 97 and 98:
FEI KEMT we can mention a generator
Page 99 and 100: FEI KEMT noise to binary signal a c
Page 101 and 102: FEI KEMT over time. For this reason
Page 103 and 104: FEI KEMT The Bucci and Luzzi Testab
Page 105 and 106: FEI KEMT CLI PLL PLL 1 2 CLJ CLK D
Page 107 and 108: FEI KEMT For R it holds that the in
Page 109 and 110: FEI KEMT extraction. In other words
Page 111 and 112: FEI KEMT and effort needed for repr
Page 113 and 114: FEI KEMT 6 True Random Number Gener
Page 115 and 116: FEI KEMT clock input F IN F FB Phas
Page 117 and 118: FEI KEMT Table 6 - 2 Parameters of
Page 119 and 120: FEI KEMT Since the size of the jitt
Page 121 and 122: FEI KEMT Table 6 - 3 Parameters set
Page 123 and 124: FEI KEMT where N1 is the number of
Page 125 and 126: FEI KEMT oscillator with frequency
Page 127 and 128: FEI KEMT Table 6 - 7 Area occupatio
Page 129 and 130: FEI KEMT 0,75 0,5 0,25 1 0 1 30 59
Page 131 and 132: FEI KEMT Stochastic Model The clock
Page 133 and 134: FEI KEMT Table 6 - 8 Mean values me
Page 135 and 136: FEI KEMT Figure 6 - 8 Sampled wavef
Page 137 and 138: FEI KEMT Table 6 - 9 Results of sta
Page 139 and 140: FEI KEMT Figure 6 - 11 Amount of sa
Page 141 and 142: FEI KEMT Figure 6 - 13 Amount of sa
Page 143 and 144: FEI KEMT 7 Research Contribution Wi
Page 145 and 146: FEI KEMT Curriculum vitae Professio
Page 147 and 148: FEI KEMT [16] Altera Corporation. S
Page 149: FEI KEMT [37] Bundesamt für Sicher
Page 153 and 154: FEI KEMT [71] Gura, N., Chang, S.,
Page 155 and 156: FEI KEMT of Commerce, month = aug,
Page 157 and 158: FEI KEMT and C. Paar, Eds., no. 216
Page 159: FEI KEMT [128] Zimmermann, P. ECMNE
show all

1 Montgomery Modular Multiplication in Hard- ware

Create successful ePaper yourself

Delete template?

Save as template?