1 Montgomery Modular Multiplication in Hard- ware

FEI KEMT
Study. In Field-Programmable Logic and Applications – FPL 2003 (Lis-
bon, Portugal, Sept. 2003), P. Y. Cheung, G. A. Constantinide, and J. T.
de Sousa, Eds., vol. 2778 of Lecture Notes in Computer Science, Springer-
Verlag, pp. 1075–1078.
[119] ˇ Simka, M., Fischer, V., Drutarovsk´y, M., and Fayolle, J. Model
of a true random number generator aimed at cryptographics applications. In
Proceedings of the International Symposium on Circuit and Systems – ISCAS
2006 (Island of Kos, Greece, May 21–24, 2006), pp. 5619–5623.
[120] ˇ Simka, M., Pelzl, J., Kleinjung, T., Franke, J., Priplata, C.,
Stahlke, C., Drutarovsk´y, M., Fischer, V., and Paar, C. Hard-
ware Factorization Based on Elliptic Curve Method. In FCCM – IEEE Sym-
posium on Field-Programmable Custom Computing Machines (Napa Valley,
California, Apr. 17–20, 2005).
[121] Walker, S., and Foo, S. Evaluating metastability in electronic circuits
for random number generation. In Proceedings of the IEEE Computer Society
Workshop on VLSI 2001 (WVLSI ’01) (2001), IEEE Computer Society, p. 99.
[122] Wollinger, T., and Paar, C. How secure are FPGAs in cryptographic
applications? (long version). Cryptology ePrint Archive, Report 2003/119,
2003.
[123] Wolski, E., Filho, J. G. S., and Dantas, M. A. R. Parallel Implementa-
tion of Elliptic Curve Method for Integer Factorization Using Message-Passing
Interface (MPI). In SBAC- PAD 13th Symposium on Computer Architecture
and High-Performance, 2001, Pirenopolis (2001).
[124] Xilinx Corporation. Virtex-E 1.8V Field Programmable Gate Arrays —
Production Product Specification.
[125] Xilinx Corporation. Superior Jitter Management with DLLs ver.1.2,
Virtech Tech Topic VTT013 ed., Jan. 2003.
[126] Xilinx Corporation. Using the Virtex Delay-Locked Loop ver.2.8, Appli-
cation Note 132: Virtex Series ed., Jan. 2006.
[127] Xilinx Corporation. Using Delay-Locked Loops in Spartan-II/IIE FPGAs
ver.1.2, Application Note 174 ed., June 2008.
139