1 Montgomery Modular Multiplication in Hard- ware

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FEI KEMT CHES 2001 (Berlin, Germany, May 13–16, 2001), Ç. K. Koç, D. Naccache, and C. Paar, Eds., vol. 2162 of Lecture Notes in Computer Science, Springer- Verlag, pp. 103–117. [101] Schneier, B. Applied Cryptography: Protocols, Algorithms, and Source Code in C, 2nd ed. John Wiley & Sons, Inc., New York, 1996. [102] Secretariat National Committee for Information Technology Standardization. Fibre Channel - Methodologies for Jitter Specification, T11.2 / Project 1230/ Rev 10, June 1999. [103] Shamir, A., and Tromer, E. Factoring Large Numbers with the TWIRL Device. In Advances in Cryptology — Crypto 2003 (2003), vol. 2729 of LNCS, Springer, pp. 1–26. [104] Silverman, R. D. The multiple polynomial quadratic sieve. Mathematics of Computation 48 (1987), 329–340. [105] Sunar, B., Martin, W. J., and Stinson, D. R. A provably secure true random number generator with built-in tolerance to active attacks. IEEE Transaction on Computers 56, 1 (2007), 109–119. [106] Tang, K., Siegel, P. H., and Milstein, L. B. A comparison of long versus short spreading sequences in coded asynchronous DS-CDMA systems. IEEE Journal on Selected Areas in Communications 19, 8 (Aug. 2001), 1614– 1624. [107] Tektronix. A Guide to Understanding and Characterizing Timing Jitter. [108] Tenca, A. F., and Ç. K. Koç. A scalable architecture for Montgomery multiplication. In Cryptographic Hardware and Embedded Systems (Berlin, Germany, 1999), Ç.K. Koç and C. Paar, Eds., no. 1717 in Computer Science, Springer Verlag, pp. 94–108. [109] Tenca, A. F., and Ç. K. Koç. A scalable architecture for modular multiplication based on Montgomery’s algorithm. IEEE Transactions on Computers 52, 9 (Sept. 2003), 1215–1221. [110] Tenca, A. F., Todorov, G., and Ç. K. Koç. High-radix design of a scalable modular multiplier. In Cryptographic Hardware and Embedded Sys- tems – CHES 2001 (Berlin, Germany, May 2001), Ç. K. Koç, D. Naccache, 137
FEI KEMT and C. Paar, Eds., no. 2162 in Lecture Notes in Computer Science, Springer- Verlag, pp. 189–205. [111] Tkacik, T. E. A hardware random number generator. In Workshop on Cryp- tographic Hardware and Embedded Systems – CHES 2002 (Berlin, Germany, Aug.13–15, 2002), B. S. Kaliski, Jr., Ç. K. Koç, and C. Paar, Eds., vol. 2523 of Lecture Notes in Computer Science, Springer-Verlag, pp. 450–453. [112] Tsoi, K., Leung, K., and Leong, P. Compact FPGA-based true and pseudo random number generators. In Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), California USA (2003), pp. 51–61. [113] ˇ Simka, M., and Drutarovský, M. Montgomery Multiplication Copro- cessor on Reconfigurable Logic. In Proceedings of 13th International Czech- Slovak Scientific Conference Radioelektronika (Brno, Czech Republic, May 6–7, 2003), pp. 95–98. [114] ˇ Simka, M., Drutarovský, M., and Fischer, V. Embedded True Ran- dom Number Generator in Actel FPGAs. In Workshop on Cryptographic Advances in Secure Hardware – CRASH 2005 (Leuven, Belgium, Sept. 6–7, 2005). [115] ˇ Simka, M., Drutarovský, M., and Fischer, V. Randomness Extrac- tion Method Based on Rationally Related Clock Signals. In Proceedings of the DSP-MCOM 2005, The 6th International Conference on Digital Signal Processing and Multimedia Communications (Koˇsice, Slovakia, Sept. 13–14, 2005), pp. 190–193. [116] ˇ Simka, M., Drutarovský, M., and Fischer, V. Performance of PLL- based True Random Number Generator in changing working conditions (Sub- mitted). Acta Electrotechnica et Informatica (2010). [117] ˇ Simka, M., and Fischer, V. Montgomery Multiplication Coprocessor for Altera Nios Embedded Processor. In Proceedings of Electronic Computers and Informatics (Herl’any, Slovakia, Oct. 2002), pp. 206–211. [118] ˇ Simka, M., Fischer, V., and Drutarovský, M. Hardware-Software Codesign in Embedded Asymmetric Cryptography Application – a Case 138
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Technical University of Koˇsice Fa
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Metadata Sheet Author: Martin ˇ Si
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FEI KEMT ciel’ovej platformy a vl
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Acknowledgement There are several p
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Contents Introduction 1 1 Montgomer
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FEI KEMT 6.2.3 Analysis of TRNG in
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FEI KEMT 6 - 2 Block diagram of dig
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List of Algorithms 1 - 1 Montgomery
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FEI KEMT π(p) prime counting funct
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FEI KEMT MWR2MM Multiple Word Radix
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FEI KEMT and Elliptic Curve Cryptog
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FEI KEMT The hardware implementatio
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FEI KEMT data inputs clock Look-up
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FEI KEMT A (X) request for B’s pr
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FEI KEMT Algorithm 1 - 1 Montgomery
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FEI KEMT In the Algorithm 1 - 1 the
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FEI KEMT by the radix b changes to
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FEI KEMT the ECC instead of the RSA
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FEI KEMT Algorithm 1 - 5 Key genera
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FEI KEMT 2 Montgomery Modular Multi
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FEI KEMT not significant. On the ot
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FEI KEMT Algorithm 2 - 2 The multip
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FEI KEMT Beside the internal struct
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FEI KEMT q x i S (j) 2 w-1 S (j) 1
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FEI KEMT x i x i-1 xi-n+1 Y (j) M (
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FEI KEMT especially if the access t
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FEI KEMT 2.2.3 Interface to Control
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FEI KEMT Clock Signal Distribution
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FEI KEMT 2.3.2 Montgomery Multiplic
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FEI KEMT 1. Fully software solution
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FEI KEMT 2.3.4 Implementation Resul
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FEI KEMT 3 Elliptic Curve Method in
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FEI KEMT improving the area-time pr
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FEI KEMT 3.3.1 Pollard’s (p − 1
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FEI KEMT If the order of P ∈ E(Fq
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FEI KEMT handicap of the Montgomery
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FEI KEMT Two major improvements hav
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FEI KEMT and case study with GNFS b
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FEI KEMT Table 4 - 1 Computational
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FEI KEMT from or writing to a singl
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FEI KEMT Algorithm 4 - 1 Modified M
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FEI KEMT Algorithm 4 - 2 Modular ad
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FEI KEMT microprocessor, e.g. Alter
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FEI KEMT timings of ECM implementat
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FEI KEMT hardware was implemented o
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FEI KEMT [68] what can be expressed
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FEI KEMT and a harvesting mechanism
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FEI KEMT control also all the syste
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FEI KEMT we can mention a generator
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FEI KEMT noise to binary signal a c
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FEI KEMT over time. For this reason
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FEI KEMT The Bucci and Luzzi Testab
Page 105 and 106: FEI KEMT CLI PLL PLL 1 2 CLJ CLK D
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Page 109 and 110: FEI KEMT extraction. In other words
Page 111 and 112: FEI KEMT and effort needed for repr
Page 113 and 114: FEI KEMT 6 True Random Number Gener
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Page 117 and 118: FEI KEMT Table 6 - 2 Parameters of
Page 119 and 120: FEI KEMT Since the size of the jitt
Page 121 and 122: FEI KEMT Table 6 - 3 Parameters set
Page 123 and 124: FEI KEMT where N1 is the number of
Page 125 and 126: FEI KEMT oscillator with frequency
Page 127 and 128: FEI KEMT Table 6 - 7 Area occupatio
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Page 131 and 132: FEI KEMT Stochastic Model The clock
Page 133 and 134: FEI KEMT Table 6 - 8 Mean values me
Page 135 and 136: FEI KEMT Figure 6 - 8 Sampled wavef
Page 137 and 138: FEI KEMT Table 6 - 9 Results of sta
Page 139 and 140: FEI KEMT Figure 6 - 11 Amount of sa
Page 141 and 142: FEI KEMT Figure 6 - 13 Amount of sa
Page 143 and 144: FEI KEMT 7 Research Contribution Wi
Page 145 and 146: FEI KEMT Curriculum vitae Professio
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Page 149 and 150: FEI KEMT [37] Bundesamt für Sicher
Page 151 and 152: FEI KEMT [54] Federal Information P
Page 153 and 154: FEI KEMT [71] Gura, N., Chang, S.,
Page 155: FEI KEMT of Commerce, month = aug,
Page 159: FEI KEMT [128] Zimmermann, P. ECMNE
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