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1 Montgomery Modular Multiplication in Hard- ware

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FEI KEMT<br />

Table 2 – 2 PE sizes and speeds for old style Altera FPGAs<br />

CPA PE CSA PE<br />

Device w Size Speed w Size Speed<br />

(bits) (LEs) (MHz) (bits) (LEs) (MHz)<br />

ACEX [7] 8 66 161 8 81 232<br />

EP1K100-1 16 130 129 16 161 202<br />

32 258 99 32 321 170<br />

APEX [8] 8 59 161 8 81 232<br />

EP20K160-1 16 115 129 16 161 202<br />

32 227 99 32 321 170<br />

Table 2 – 3 PE sizes and speeds for new style Altera FPGAs<br />

CPA PE CSA PE<br />

Device w Size Speed w Size Speed<br />

(bits) (LEs) (MHz) (bits) (LEs) (MHz)<br />

CYCLONE [13] 8 59 277 8 81 304<br />

EP1C20-6 16 115 235 16 161 304<br />

32 227 221 32 321 304<br />

STRATIX [18] 8 59 271 8 81 304<br />

EP1S10-6 16 115 248 16 161 304<br />

32 227 214 32 321 304<br />

The most important fact concerns the speed of the PEs. As it could be expected,<br />

the CSA PE is always faster and the speed vary either only slightly (for old families)<br />

or almost not at all (for recent families, probably due to enhanced rout<strong>in</strong>g possi-<br />

bilities) with the word length w. However, the speed of the CPA PE <strong>in</strong> the older<br />

families decreases significantly with the word length (about 40% from 8 bits to 32<br />

bits). Recent Altera devices use enhanced carry cha<strong>in</strong>. So-called carry-select cha<strong>in</strong><br />

uses the redundant carry calculation (hard-wired) to <strong>in</strong>crease the speed of carry<br />

functions. This feature enables to get process<strong>in</strong>g times for CPA PE comparable to<br />

CSA PE (but slower about 10 to 30%). S<strong>in</strong>ce CPA PE is about 20% smaller, one<br />

can improve the f<strong>in</strong>al speed <strong>in</strong>creas<strong>in</strong>g number of pipel<strong>in</strong>ed stages. However, this<br />

approach does not seem to be adequate for word lengths w > 32 bits.<br />

37

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