1 Montgomery Modular Multiplication in Hard- ware

FEI KEMT
not significant. On the other hand, the possibility to remove correction unit from
hardware design of Algorithm 1 – 4 brings valuable advantage.
In the rest of the thesis the notions e1 or e2 are used to denote the number of
words in cases we need to emphasis the difference of the number of words in the
algorithms, or we use the notation e in case we mean a number of words in general.
2.1.1 Scalable Multiple-Word Algorithms
Operations in Algorithm 1 – 3 and Algorithm 1 – 4 are performed on the full-precision
operands and do not provide scalability feature explained above. We analyse rela-
tions between parameters of the multipliers and underlying FPGA structure and
provide solution suitable for devices including fast carry architecture.
A scalable algorithm in which the operand Y (multiplicand) is scanned word-
by-word, and the operand X (multiplier) is scanned bit-by-bit was proposed in
[108,109]. The Multiple Word Radix-2 Montgomery Multiplication algorithm (MW-
R2MM) uses the following vectors:
M = (M (e−1) , . . . , M (1) , M (0) ) (2.1)
Y = (Y (e−1) , . . . , Y (1) , Y (0) )
S = (S (e−1) , . . . , S (1) , S (0) )
X = (xk−1, . . . , x1, x0)
where the words are marked with superscripts and the bits are marked with sub-
scripts. The concatenation of vectors a and b is noted as (a, b). A particular range
of bits in a vector a from position i to position j, j > i will be expressed as aj..i.
The bit position i of the k-th word of a is represented by symbol a (k)
i .
The details of the MWR2MM algorithm (further referred to as MWR2MM CSA,
where CSA states for Carry-Save Adder) are given in [108] and in the thesis it will
be denoted as Algorithm 2 – 1. Optimized version of MMM Algorithm 1 – 4 can be
transformed to a multiple word form (referred to as MWR2MM CPA, where CPA
states for Carry-Propagate Adder) in a similar way, shown in Algorithm 2 – 2. The
reason for such naming of algorithms is given by the way of their implementation
and we explain more about it in the following parts of the thesis.
The algorithms compute a partial sum S for each bit of X, scanning the words
of Y and M. Once the precision is exhausted, another bit of X is taken, and the
scan is repeated. Thus, the algorithms MWR2MM CSA as well as MWR2MM CPA
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