04.11.2012 Views

1 Montgomery Modular Multiplication in Hard- ware

1 Montgomery Modular Multiplication in Hard- ware

1 Montgomery Modular Multiplication in Hard- ware

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

Preface<br />

Systems for public key cryptography are <strong>in</strong>tensively applied <strong>in</strong> order to digitally sign<br />

or encrypt data. In this way we assure <strong>in</strong>tegrity and confidentiality of the signed<br />

message and provide authentication and non-repudiation features for a signer. The<br />

complexity of computations has impact on performance of the system, especially <strong>in</strong><br />

case of long keys. The security of the operations is based on secrecy of the private<br />

key, while its public part and the algorithm itself are publicly known.<br />

In the first part of thesis we analyse the computational part of the systems and<br />

focus on flexible implementation of modular multiplier. The output of the research<br />

was applied <strong>in</strong> order to estimate performance of Elliptic Curve Method (ECM)<br />

<strong>in</strong>creased thanks to its hard<strong>ware</strong> realisation. Scalable nature of the multiplier was<br />

spread <strong>in</strong> the whole design, and the proof-of-concept implementation was designed<br />

and tested <strong>in</strong> a very short time.<br />

In the second part of document we focus on the key generat<strong>in</strong>g element – a Ran-<br />

dom Number Generator (RNG). Already known design was analysed under several<br />

aspects and we provide results <strong>in</strong> the form of a stochastic model of the RNG and<br />

proposed test<strong>in</strong>g methods suitable for this type of RNGs.<br />

The target platform for the selected build<strong>in</strong>g blocks of cryptosystems is FPGA<br />

(Field Programmable Gate Array) what offers a reduction of development time, wide<br />

range of devices and high level of security. In the thesis analyse particular families of<br />

devices from FPGA vendors which <strong>in</strong>clude dedicated electronic elements used <strong>in</strong> our<br />

designs. Parameters of the blocks and algorithm improvements may have significant<br />

impact on the performance of system.<br />

Three topics of the thesis provide a picture of complexity level <strong>in</strong> cryptology and<br />

underl<strong>in</strong>e relevance of research <strong>in</strong> area of cryptographic systems implementation.

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!