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NP Control with Optimal Sequence SVM 131 The duty cycle d xyz (= T xyz/T MP) of the two middle vectors in the sequence are given directly by the NTV SVM. The same is true for the sum of the duty cycles of the starting and the ending vectors: d 210 d 432 = 1− d310 − d431 + (80) The two redundant states {210} 3D and {432} 3D need to be timed such that the FC’s stay balanced. This can be achieved by: d + d = d + d 0.5 (81) 210 310 431 432 = This condition can be met for all space vectors within the small blue triangle and more generally for: ( 310 431 < d < 0.5) AND( d 0.5) (82) This means that the red triangle can use the same sequence. This can also be confirmed by the analysis of the vertices of the red triangle: - {432 – 210} MV - {432 – 310} VV1 - {431 – 210} VV1 The resulting sequence is again (as predicted): - {210 – 310 – 431 – 432} 3D Likewise, many other small triangles share common sequences. However, this does not matter from implementation point of view. Simply identical sequences will be stored in certain parts of a look up table. Like with an individual virtual vector, the sequence can be used to choose the NP current generated by phase b. The states to generate levels 1 and 3 in phase b can be chosen to either have zero NP current (I NP_b = 0 if all states connecting to plus or minus of the DC link) or the full phase b current in the NP (I NP_b = I b for all states connecting to NP). The total NP current is the sum of the chosen phase b NP current and the phase a and phase c NP current, which depend on the state selector for the FC control in the corresponding phases. Obviously, this scheme is most powerful if the current in phase b is largest, which is the case for reactive power operation in the chosen triangle. Outside of the star shaped area with blue dots in Figure 90, no virtual vectors type 1 are available. The proposed concept cannot be applied directly, but the same approach can be taken with larger triangles and virtual vectors type 2.
132 NP Control with Optimal Sequence SVM 100% 96.5% 81% 65% 50% β Hexagon α Regular Vectors Modified Vectors Virtual Vectors 1 Virtual Vectors 2 Figure 92, Sample triangle incorporating three virtual vectors type 2 The following virtual vectors type 2 can be generated with the green triangle: - {432 – 410} VV2 - {410 – 430} VV2 - {210 – 432} VV2 The resulting virtual vector sequence is: - {210 – 410 – 430 – 432} 3D The duty cycles of these states are easily calculated by an NTV SVM algorithm based on large size triangles. The sequence based virtual vectors type 2 is applied only, if no sequence based on virtual vectors type 1 is available. For example, the proposed triangle incorporates the small size triangles from the previous paragraph. The virtual vector 2 sequence could also be applied for those triangles, but the virtual vector 1 sequence is preferable regarding switching losses and output voltage distortion. The yellow triangle in Figure 93 can be formed by modified and virtual vector states using partner states in any of the three phases a, b or c. Each phase offers several possible sequences with different starting point and different CM voltage. Examples for the different phases: - Sequence for phase a: {100 – 110 – 321 – 322} 3D - Sequence for phase b: {210 – 211 – 332 – 432} 3D - Sequence for phase c: {221 – 321 – 433 – 443 } 3D The actual sequence depends on the small triangles. There will be multiple different sequences to be used within the yellow triangle. Depending on the current amplitudes in the three phases, one of the sequences can be chosen. As a consequence, this strategy is effective for any load angle for low modulation depth.
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THÈSE En vue de l'obtention du DOC
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Acknowledgements i ACKNOWLEDGEMENTS
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iv Table of Contents 3.4 Generic ML
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vi Table of Contents 7.1 General mo
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viii Résumé français (French sum
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x Résumé français (French summar
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xiv Résumé français (French summ
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xviii Résumé français (French su
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Introduction 1 2 INTRODUCTION This
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Introduction 3 tighter capacitor di
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Introduction 5 TABLE 1, OPERATING R
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Introduction 7 2.3 Glossary Note th
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Introduction 9 2.4 Nomenclature Not
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Introduction 11 DPC DSP DTC FC FPGA
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ML Converter Topologies 13 3 ML CON
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ML Converter Topologies 15 The four
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ML Converter Topologies 17 Each swi
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ML Converter Topologies 19 size doe
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ML Converter Topologies 21 plus (a)
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ML Converter Topologies 23 N >= 2,
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ML Converter Topologies 25 (a) (b)
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ML Converter Topologies 27 (a) (b)
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ML Converter Topologies 29 In a pra
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ML Converter Topologies 31 reality,
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ML Converter Topologies 33 All cons
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ML Converter Topologies 35 TABLE 16
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ML Converter Topologies 37 TABLE 17
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ML Converter Topologies 39 3.7.4.1
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ML Converter Topologies 41 f C sw =
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ML Converter Topologies 43 A second
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ML Converter Topologies 45 Limitati
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ML Converter Topologies 47 1 K M 2
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ML Converter Topologies 49 3.8 Exec
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52 3-L DC Link ML Converter Propert
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Page 110 and 111: NP Control with Carrier based PWM 8
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Page 170 and 171: Application and Verification 149 7
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Page 188: Application and Verification 167 7.
Page 191 and 192: 170 Conclusions and Outlook 8.1.2 M
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182 Appendix 9.4 States of the ANPC
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184 Appendix 9.5 NP currents as a f
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186 Appendix 9.5.3 Maximum and mini
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188 Appendix 9.6 NP current functio
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190 Appendix TABLE 91, NP CURRENT I
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192 Appendix TABLE 93, NP CURRENT I
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Bibliography 195 10 BIBLIOGRAPHY [1
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Bibliography 197 [33] P. Steimer,
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Bibliography 199 neutral point bala
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Bibliography 201 [88] J. Pou, J. Za
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Christoph Haederli - Les thÃ¨ses en ligne de l'INP - Institut National ...

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