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NP Control with Optimal Sequence SVM 133 100% 96.5% 81% 65% 50% β Hexagon α Regular Vectors Modified Vectors Virtual Vectors 1 Virtual Vectors 2 Figure 93, Sample small triangle with virtual vector sequences for all phases TABLE 52, DEFINITION OF THE VIRTUAL VECTOR SEQUENCE MODULATION SCHEME 1. Predetermined sequences of 4 states shall be applied. This corresponds with half a SVM or CB PWM period. Two types of sequences are possible: a. Virtual vector sequence type 1 based on regular size triangles and incorporating only modified vectors or virtual vectors type 1. No DM distortion is generated in this case. b. Virtual vector sequence type 2 based on large size triangles and incorporating also virtual vectors type 2. DM distortion is generated in this case. 2. The choice of sequence is based on small triangles (according to virtual vector type 1 spacing) 3. The actual sequences to be applied are based on triangles of original or double size. 4. Some small triangles (e.g. outside the star region) refer to the same sequence. 5. Multiple sequences may be stored per triangle. The sequence to be applied is chosen based on operating point (load angle) or a chosen optimization criteria. Namely, there are several options in the low modulation depth range, where all phases feature partner states. 6. Redundant states in phases not related to the partner states are chosen online (modification of the predetermined sequences) according to the state selection scheme also used in the standard modulators (depending on FC voltage deviation and phase current)
134 NP Control with Optimal Sequence SVM 6.1.4.2 Availability of virtual vector sequences Four different regions have been identified: 1. Region at low modulation depth where virtual vector sequences type 1 are available for all of the three phases (yellow in Figure 94). This region performs well for all load angles. 2. Region at intermediate modulation depth where virtual vector sequences type 1 are available only for one phase (blue in Figure 94). This region extends the effective operating range, while keeping a non distorted DM output. This region performs best in reactive power operation. 3. Region at high modulation depth where virtual vector sequences type 2 are available for one phase (red in Figure 94). This region generates higher switching losses and increases DM distortion, but it is effective up to the over-modulation region. It performs best for reactive power but also improves the NP control capacity for active power operation. 4. Region at high modulation depth where no virtual vector sequences are available at all. In these regions, any standard modulation and NP control scheme can be applied. 100% 96.5% 81% 65% 50% β Hexagon α Regular Vectors Modified Vectors Virtual Vectors 1 Virtual Vectors 2 Figure 94, Availability of virtual vector sequences The red area outside of the star shaped area defined by the green dots has virtual vector sequences type 2; however, there will be no perfect balance of the flying capacitors but improved NP controllability. A scheme without that extension can easily be implemented by a different sequence selection scheme. The whole area of the hexagon is covered well with virtual vector sequences, which indicates that the concept is powerful for all physically possible modulation depths including the non sinusoidal over modulation region. 6.1.5 Performance impact of modified and virtual vectors 6.1.5.1 Minimum and maximum NP currents in function of θ Minimum and maximum NP currents can be calculated for balanced and undistorted operating conditions by simply applying a matrix of operating points to the controller. Limits for pure reactive power operation are given in Figure 95. The impact on minimum and maximum NP
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THÈSE En vue de l'obtention du DOC
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Acknowledgements i ACKNOWLEDGEMENTS
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iv Table of Contents 3.4 Generic ML
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vi Table of Contents 7.1 General mo
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viii Résumé français (French sum
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Introduction 1 2 INTRODUCTION This
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Introduction 3 tighter capacitor di
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Introduction 5 TABLE 1, OPERATING R
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Introduction 7 2.3 Glossary Note th
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Introduction 9 2.4 Nomenclature Not
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Introduction 11 DPC DSP DTC FC FPGA
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ML Converter Topologies 13 3 ML CON
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ML Converter Topologies 15 The four
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ML Converter Topologies 17 Each swi
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ML Converter Topologies 19 size doe
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ML Converter Topologies 21 plus (a)
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ML Converter Topologies 23 N >= 2,
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ML Converter Topologies 25 (a) (b)
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ML Converter Topologies 27 (a) (b)
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ML Converter Topologies 29 In a pra
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ML Converter Topologies 31 reality,
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ML Converter Topologies 33 All cons
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ML Converter Topologies 35 TABLE 16
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ML Converter Topologies 37 TABLE 17
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ML Converter Topologies 39 3.7.4.1
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ML Converter Topologies 43 A second
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ML Converter Topologies 45 Limitati
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ML Converter Topologies 47 1 K M 2
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ML Converter Topologies 49 3.8 Exec
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184 Appendix 9.5 NP currents as a f
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186 Appendix 9.5.3 Maximum and mini
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188 Appendix 9.6 NP current functio
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190 Appendix TABLE 91, NP CURRENT I
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192 Appendix TABLE 93, NP CURRENT I
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Bibliography 195 10 BIBLIOGRAPHY [1
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Bibliography 197 [33] P. Steimer,
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Bibliography 199 neutral point bala
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Bibliography 201 [88] J. Pou, J. Za
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