Christoph Haederli - Les thèses en ligne de l'INP - Institut National ...
Christoph Haederli - Les thèses en ligne de l'INP - Institut National ...
Christoph Haederli - Les thèses en ligne de l'INP - Institut National ...
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3-L DC Link ML Converter Properties 53<br />
i = * i<br />
(32)<br />
S1 d1<br />
* iout<br />
= α<br />
out<br />
i = d2*<br />
i = (1 − ) i<br />
(33)<br />
S 2 out<br />
α<br />
u = α * U<br />
out<br />
out_<br />
DC− DC<br />
(34)<br />
In flying capacitor stages, multiple commutation cells are connected in series. Each of the cells<br />
can have its own duty cycle α x.<br />
U DC<br />
α1 α2 α3<br />
U out<br />
Figure 46, 4-L MC converter<br />
To keep the flying capacitor voltages balanced, all upper switch average curr<strong>en</strong>t must be equal<br />
and all lower switch average curr<strong>en</strong>ts must be equal. According to Kirchhoff’s law, the resulting<br />
flying capacitor average curr<strong>en</strong>ts will be zero. As the switch curr<strong>en</strong>ts are directly related to the duty<br />
cycles (32), (33), all duty cycles must be equal on average. Instantaneous values may differ. For a<br />
multi cell converter with n cells we can state that there is one common α:<br />
x ∈{ 1,.., N}<br />
→ α = α , N = number of cells (35)<br />
x<br />
To get optimum modulation, the multiple cells need to be operated interleaved. There needs to<br />
be an according phase shift betwe<strong>en</strong> the switching patterns of the individual cells. One simple way<br />
to implem<strong>en</strong>t that is with a carrier based PWM with phase shifted carriers. All of the phase angles<br />
in the set A are applied, none twice. The or<strong>de</strong>r does not need to be specific to assure balancing of<br />
the capacitors.<br />
A = { 0,2π<br />
/ n,4π<br />
/ n,..,2(<br />
n −1)<br />
π / n}<br />
(36)<br />
x ∈ { 1,.., N}<br />
∧ y ∈{1,..,<br />
N}<br />
∧ x ≠ y → ϕ ∈ A ∧ ϕ ∈ A ∧ϕ<br />
≠ ϕ<br />
(37)<br />
x<br />
y<br />
x<br />
y<br />
This type of modulation <strong>en</strong>sures the <strong>de</strong>sired output voltage according to (34). The same<br />
average output voltage can also be obtained with differ<strong>en</strong>t phase displacem<strong>en</strong>t, but no optimum<br />
modulation is achieved (for example: phase shift zero leads to synchronized switching and 2-L<br />
behavior, the advantage of multilevel operation is lost). The same concepts for calculations with<br />
average curr<strong>en</strong>ts, voltages and duty cycles also apply to all combinations of commutation cells used<br />
in the 3-L DC link topologies. Specifically, we can also <strong>de</strong>fine a duty cycle α L for a complete phase