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ML Converter Topologies 15 The four switches connected to the DC supply constitute a 3-L voltage selector. The four switches on the output side can optionally series connect the flying capacitor. As the flying capacitor is controlled to one fourth of the total DC link voltage, a total of five output levels can be generated. Output levels can be changed by commutations from one current path to another. The parts of the currents paths that are not shared form the commutation loop. Commutating from one path to the other corresponds with a current reversal in that loop. The commutation is initiated by the turn on or the turn off of the active device (e.g. IGBT, IGCT, MOSFET), so that the current is commutated between that device and a corresponding diode. Commutation loops can be rather complex or very simple. Compact commutation loops keep the stray inductances small and allow for fast switching with limited turn off voltage peaks on the switching devices. 3.2.1 Switching cell concept The switching cell concept helps for both synthesis and analysis of converter structures. A switching cell is essentially the sum of all component in a given commutation loop. ML-VSC’s can be assembled by a combination of multiple switching cells. This may be either by simple connection of switching cells or by building more complex structures with nested or overlapping cells. In the latter case, the actual switching cells are less obvious; however, the basic operating principle with predetermined commutation loops remains always the same. U DC U DC U FC Flying Capacitor (FC) Commutation loops (a) (b) Figure 18, Basic switching cells: 2-L half bridge cell (a), flying capacitor switching cell (b) The most important switching cells used in this document are the half bridge cell (2-level converter) and the flying capacitor cell as shown in Figure 18. The half bridge cell simply commutates between upper and lower branch and thus generates a 2 level output. The flying capacitor switching cell also has an input voltage and two adjacent switches, but instead of connecting those switches directly, there is the flying capacitor placed in between. Consequently, the flying capacitor switching cell is a 4-pole. The two output potentials on the flying capacitor are either U IN- and (U IN- + U CF) or (U IN+ – U CF) and U IN+; they can further be connected to subsequent switching cells like a half bridge cell or another flying capacitor cell.
16 ML Converter Topologies 3.3 Fundamental converter types 3.3.1 Diode clamped converter The NPC as shown in Figure 19 (a) contains two switching cells, one for the upper capacitor and one for the lower capacitors. The two cells share components and have overlapping commutation loops. Furthermore, there are different commutation loops for different current polarities (green for positive output current, red for negative output current, only upper DC link commutations shown). The loop for negative currents includes more series components and is thus more difficult to design for low stray inductance. The concept of the NPC can be extended to more levels by adding more intermediate points in the DC link and clamping those points with diodes to the appropriate active switch nodes (e.g. 4-L MLDC, Figure 19 b). The MLDC (Multi Level Diode Clamped) converter has already been included in Bakers patent from 1981 [9]. U DC+ Commutation loops U DC U out U DC- (a) (b) Figure 19, 3-L neutral point clamped converter (NPC) with commutation loops 3.3.2 MC converter The connection of multiple flying capacitor switching cells and a final half bridge cell results in the MC converter or flying capacitor converter (Figure 20), which has been introduced by Meynard and Foch in 1992. Its design and functionality is presented in [19] and [20]. The circuit shown in Figure 20 is a 4 level converter requiring 3 switching cells and 2 flying capacitors. U DC =U CN U C2 U C1 U out Figure 20, 4-L MC converter
Page 1 and 2: THÈSE En vue de l'obtention du DOC
Page 3: Acknowledgements i ACKNOWLEDGEMENTS
Page 6 and 7: iv Table of Contents 3.4 Generic ML
Page 8 and 9: vi Table of Contents 7.1 General mo
Page 10 and 11: viii Résumé français (French sum
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Page 22 and 23: Introduction 1 2 INTRODUCTION This
Page 24 and 25: Introduction 3 tighter capacitor di
Page 26 and 27: Introduction 5 TABLE 1, OPERATING R
Page 28 and 29: Introduction 7 2.3 Glossary Note th
Page 30 and 31: Introduction 9 2.4 Nomenclature Not
Page 32 and 33: Introduction 11 DPC DSP DTC FC FPGA
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NP Control with Carrier based PWM 8
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Application and Verification 149 7
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Application and Verification 151 TA
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Application and Verification 155 7.
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170 Conclusions and Outlook 8.1.2 M
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172 Conclusions and Outlook 8.2 Out
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174 Conclusions and Outlook 8.3 Sum
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176 Appendix I = 1− ) (99) ( C 2
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178 Appendix TABLE 78, FLYING CAPAC
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180 Appendix 9.3 Single phase NP cu
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182 Appendix 9.4 States of the ANPC
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184 Appendix 9.5 NP currents as a f
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186 Appendix 9.5.3 Maximum and mini
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188 Appendix 9.6 NP current functio
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190 Appendix TABLE 91, NP CURRENT I
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192 Appendix TABLE 93, NP CURRENT I
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Bibliography 195 10 BIBLIOGRAPHY [1
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Bibliography 197 [33] P. Steimer,
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Bibliography 199 neutral point bala
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Bibliography 201 [88] J. Pou, J. Za
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Christoph Haederli - Les thÃ¨ses en ligne de l'INP - Institut National ...

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