Bibliography 201 [88] J. Pou, J. Zaragoza, P. Rodriguez, S. Ceballos, V. Sala, R. Burgos, and D. Boroyevich, “Fast-processing modulation strategy for the neutral-point-clamped converter with total elimination of low-frequ<strong>en</strong>cy voltage oscillations in the neutral point,” Industrial Electronics, IEEE Transactions on, vol. 54, no. 4, pp. 2288–2294, Aug. 2007. [89] J. Zaragoza, J. Pou, S. Ceballos, E. Robles, and C. Ja<strong>en</strong>, “Optimal voltage-balancing comp<strong>en</strong>sator in the modulation of a neutral-point-clamped converter,” Industrial Electronics, 2007. ISIE 2007. IEEE International Symposium on, pp. 719–724, June 2007. [90] A. Vi<strong>de</strong>t, P. Le Moigne, N. Idir, P. Bau<strong>de</strong>sson, and X. Cimetiere, “A new carrier-based PWM providing common-mo<strong>de</strong>-curr<strong>en</strong>t reduction and DC-bus balancing for three-level inverters,” Industrial Electronics, IEEE Transactions on, vol. 54, no. 6, pp. 3001–3011, Dec. 2007. [91] M. Marchesoni, P. Segarich, and E. Soressi, “A new control strategy for neutral-pointclamped active rectifiers,” Industrial Electronics, IEEE Transactions on, vol. 52, no. 2, pp. 462–470, April 2005. [92] D. H. Lee, S. Lee, and F. Lee, “An analysis of midpoint balance for the neutral-pointclamped three-level vsi,” Power Electronics Specialists Confer<strong>en</strong>ce, 1998. PESC 98 Record. 29th Annual IEEE, vol. 1, pp. 193–199 vol.1, May 1998. [93] H. du Toit Mouton, “Natural balancing of three-level neutral-point-clamped PWM inverters,” Industrial Electronics, IEEE Transactions on, vol. 49, no. 5, pp. 1017–1025, Oct 2002. [94] I. Salagae and H. du T Mouton, “Natural balancing of neutral-point-clamped converters un<strong>de</strong>r pod pulsewidth modulation,” Power Electronics Specialist Confer<strong>en</strong>ce, 2003. PESC '03. 2003 IEEE 34th Annual, vol. 1, pp. 47–52 vol.1, June 2003. [95] X. Yuan, H. Stemmler, and I. Barbi, “Investigation on the clamping voltage self-balancing of the three-level capacitor clamping inverter,” Power Electronics Specialists Confer<strong>en</strong>ce, 1999. PESC 99. 30th Annual IEEE, vol. 2, pp. 1059–1064 vol.2, 1999. [96] R. Wilkinson, H. du Mouton, and T. Meynard, “Natural balance of multicell converters,” Power Electronics Specialist Confer<strong>en</strong>ce, 2003. PESC '03. 2003 IEEE 34th Annual, vol. 3, pp. 1307–1312 vol.3, June 2003. [97] R. H. Wilkinson, T. A. Meynard, and H. du Toit Mouton, “Natural balance of multicell converters: The two-cell case,” Power Electronics, IEEE Transactions on, vol. 21, no. 6, pp. 1649–1657, Nov. 2006. [98] R. H. Wilkinson, T. H. Meynard, and H. du Toit Mouton, “Natural balance of multicell converters: The g<strong>en</strong>eral case,” Power Electronics, IEEE Transactions on, vol. 21, no. 6, pp. 1658–1666, Nov. 2006. [99] B. McGrath and D. Holmes, “Analytical <strong>de</strong>termination of the capacitor voltage balancing dynamics for three phase flying capacitor converters,” Industry Applications Confer<strong>en</strong>ce, 2007. 42nd IAS Annual Meeting. Confer<strong>en</strong>ce Record of the 2007 IEEE, pp. 1974–1981, Sept. 2007. [100] B. McGrath and D. Holmes, “Analytical mo<strong>de</strong>lling of voltage balance dynamics for a flying capacitor multilevel converter,” Power Electronics, IEEE Transactions on, vol. 23, no. 2, pp. 543–550, March 2008.
202 Bibliography [101] G. Gateau, T. A. Meynard, and H. Foch, “Stacked multicell converter (smc): properties and <strong>de</strong>sign,” PESC 2001, Proceedings of the IEEE, pp. 1583 – 1588, 2001. [102] L. Delmas, G. Gateau, T. Meynard, and H. Foch, “Stacked multicell converter (smc): control and natural balancing,” Power Electronics Specialists Confer<strong>en</strong>ce, 2002. pesc 02. 2002 IEEE 33rd Annual, vol. 2, pp. 689–694 vol.2, 2002. [103] C. Liu, B. Wu, D. Xu, N. Zargari, and S. Rizzo, “Progressive natural balance of neutralpoint voltage of three-level NPC inverter with a modified SVM scheme,” Applied Power Electronics Confer<strong>en</strong>ce and Exposition, 2006. APEC '06. Tw<strong>en</strong>ty-First Annual IEEE, pp. 4 pp.–, March 2006. [104] O. Alonso, L. Marroyo, P. Sanchis, E. Gubia, and A. Guerrero, “Analysis of neutral-point voltage balancing problem in three-level neutral-point-clamped inverters with SVPWM modulation,” IECON 02 [Industrial Electronics Society, IEEE 2002 28th Annual Confer<strong>en</strong>ce of the], vol. 2, pp. 920–925 vol.2, Nov. 2002. [105] J. Pou, D. Boroyevich, and R. Pindado, “Effects of imbalances and nonlinear loads on the voltage balance of a neutral-point-clamped inverter,” Power Electronics, IEEE Transactions on, vol. 20, no. 1, pp. 123–131, Jan. 2005. [106] G. Scheuer, Ph.D. dissertation. [107] B. McGrath, D. Holmes, and T. Lipo, “Optimized space vector switching sequ<strong>en</strong>ces for multilevel inverters,” Power Electronics, IEEE Transactions on, vol. 18, no. 6, pp. 1293–1301, Nov. 2003. [108] C. De Almeida Martins, “Direct torque control of an induction machine fed by a multilevel converter with imposed frequ<strong>en</strong>cy,” Ph.D. dissertation, INP Toulouse, 2000. [109] J. Pou, R. Pindado, D. Boroyevich, and P. Rodriguez, “Limits of the neutral-point balance in back-to-back-connected three-level converters,” Power Electronics, IEEE Transactions on, vol. 19, no. 3, pp. 722–731, May 2004.
- Page 1 and 2:
THÈSE En vue de l'obtention du DOC
- Page 3:
Acknowledgements i ACKNOWLEDGEMENTS
- Page 6 and 7:
iv Table of Contents 3.4 Generic ML
- Page 8 and 9:
vi Table of Contents 7.1 General mo
- Page 10 and 11:
viii Résumé français (French sum
- Page 12 and 13:
x Résumé français (French summar
- Page 14 and 15:
xii Résumé français (French summ
- Page 16 and 17:
xiv Résumé français (French summ
- Page 18 and 19:
xvi Résumé français (French summ
- Page 20 and 21:
xviii Résumé français (French su
- Page 22 and 23:
Introduction 1 2 INTRODUCTION This
- Page 24 and 25:
Introduction 3 tighter capacitor di
- Page 26 and 27:
Introduction 5 TABLE 1, OPERATING R
- Page 28 and 29:
Introduction 7 2.3 Glossary Note th
- Page 30 and 31:
Introduction 9 2.4 Nomenclature Not
- Page 32 and 33:
Introduction 11 DPC DSP DTC FC FPGA
- Page 34 and 35:
ML Converter Topologies 13 3 ML CON
- Page 36 and 37:
ML Converter Topologies 15 The four
- Page 38 and 39:
ML Converter Topologies 17 Each swi
- Page 40 and 41:
ML Converter Topologies 19 size doe
- Page 42 and 43:
ML Converter Topologies 21 plus (a)
- Page 44 and 45:
ML Converter Topologies 23 N >= 2,
- Page 46 and 47:
ML Converter Topologies 25 (a) (b)
- Page 48 and 49:
ML Converter Topologies 27 (a) (b)
- Page 50 and 51:
ML Converter Topologies 29 In a pra
- Page 52 and 53:
ML Converter Topologies 31 reality,
- Page 54 and 55:
ML Converter Topologies 33 All cons
- Page 56 and 57:
ML Converter Topologies 35 TABLE 16
- Page 58 and 59:
ML Converter Topologies 37 TABLE 17
- Page 60 and 61:
ML Converter Topologies 39 3.7.4.1
- Page 62 and 63:
ML Converter Topologies 41 f C sw =
- Page 64 and 65:
ML Converter Topologies 43 A second
- Page 66 and 67:
ML Converter Topologies 45 Limitati
- Page 68 and 69:
ML Converter Topologies 47 1 K M 2
- Page 70:
ML Converter Topologies 49 3.8 Exec
- Page 73 and 74:
52 3-L DC Link ML Converter Propert
- Page 75 and 76:
54 3-L DC Link ML Converter Propert
- Page 77 and 78:
56 3-L DC Link ML Converter Propert
- Page 79 and 80:
58 3-L DC Link ML Converter Propert
- Page 81 and 82:
60 3-L DC Link ML Converter Propert
- Page 83 and 84:
62 3-L DC Link ML Converter Propert
- Page 85 and 86:
64 3-L DC Link ML Converter Propert
- Page 87 and 88:
66 3-L DC Link ML Converter Propert
- Page 89 and 90:
68 3-L DC Link ML Converter Propert
- Page 91 and 92:
70 3-L DC Link ML Converter Propert
- Page 93 and 94:
72 3-L DC Link ML Converter Propert
- Page 95 and 96:
74 3-L DC Link ML Converter Propert
- Page 97 and 98:
76 3-L DC Link ML Converter Propert
- Page 99 and 100:
78 3-L DC Link ML Converter Propert
- Page 101 and 102:
80 3-L DC Link ML Converter Propert
- Page 103 and 104:
82 3-L DC Link ML Converter Propert
- Page 105 and 106:
84 3-L DC Link ML Converter Propert
- Page 107 and 108:
86 3-L DC Link ML Converter Propert
- Page 110 and 111:
NP Control with Carrier based PWM 8
- Page 112 and 113:
NP Control with Carrier based PWM 9
- Page 114 and 115:
NP Control with Carrier based PWM 9
- Page 116 and 117:
NP Control with Carrier based PWM 9
- Page 118 and 119:
NP Control with Carrier based PWM 9
- Page 120 and 121:
NP Control with Carrier based PWM 9
- Page 122 and 123:
NP Control with Carrier based PWM 1
- Page 124 and 125:
NP Control with Carrier based PWM 1
- Page 126 and 127:
NP Control with Carrier based PWM 1
- Page 128 and 129:
NP Control with Carrier based PWM 1
- Page 130 and 131:
NP Control with Carrier based PWM 1
- Page 132 and 133:
NP Control with Carrier based PWM 1
- Page 134 and 135:
NP Control with Carrier based PWM 1
- Page 136 and 137:
NP Control with Carrier based PWM 1
- Page 138 and 139:
NP Control with Carrier based PWM 1
- Page 140 and 141:
NP Control with Carrier based PWM 1
- Page 142 and 143:
NP Control with Carrier based PWM 1
- Page 144 and 145:
NP Control with Optimal Sequence SV
- Page 146 and 147:
NP Control with Optimal Sequence SV
- Page 148 and 149:
NP Control with Optimal Sequence SV
- Page 150 and 151:
NP Control with Optimal Sequence SV
- Page 152 and 153:
NP Control with Optimal Sequence SV
- Page 154 and 155:
NP Control with Optimal Sequence SV
- Page 156 and 157:
NP Control with Optimal Sequence SV
- Page 158 and 159:
NP Control with Optimal Sequence SV
- Page 160 and 161:
NP Control with Optimal Sequence SV
- Page 162 and 163:
NP Control with Optimal Sequence SV
- Page 164 and 165:
NP Control with Optimal Sequence SV
- Page 166 and 167:
NP Control with Optimal Sequence SV
- Page 168 and 169:
NP Control with Optimal Sequence SV
- Page 170 and 171:
Application and Verification 149 7
- Page 172 and 173: Application and Verification 151 TA
- Page 174 and 175: Application and Verification 153 Th
- Page 176 and 177: Application and Verification 155 7.
- Page 178 and 179: Application and Verification 157 7.
- Page 180 and 181: Application and Verification 159 7.
- Page 182 and 183: Application and Verification 161 TA
- Page 184 and 185: Application and Verification 163 7.
- Page 186 and 187: Application and Verification 165 TA
- Page 188: Application and Verification 167 7.
- Page 191 and 192: 170 Conclusions and Outlook 8.1.2 M
- Page 193 and 194: 172 Conclusions and Outlook 8.2 Out
- Page 195 and 196: 174 Conclusions and Outlook 8.3 Sum
- Page 197 and 198: 176 Appendix I = 1− ) (99) ( C 2
- Page 199 and 200: 178 Appendix TABLE 78, FLYING CAPAC
- Page 201 and 202: 180 Appendix 9.3 Single phase NP cu
- Page 203 and 204: 182 Appendix 9.4 States of the ANPC
- Page 205 and 206: 184 Appendix 9.5 NP currents as a f
- Page 207 and 208: 186 Appendix 9.5.3 Maximum and mini
- Page 209 and 210: 188 Appendix 9.6 NP current functio
- Page 211 and 212: 190 Appendix TABLE 91, NP CURRENT I
- Page 213 and 214: 192 Appendix TABLE 93, NP CURRENT I
- Page 216 and 217: Bibliography 195 10 BIBLIOGRAPHY [1
- Page 218 and 219: Bibliography 197 [33] P. Steimer,
- Page 220 and 221: Bibliography 199 neutral point bala