Christoph Haederli - Les thÃ¨ses en ligne de l'INP - Institut National ...

More documents

Recommendations

Info

ML Converter Topologies 19 size does not increase with the number of levels. The different cells can be operated essentially independently from each other from commutation point of view. (a) (b) (c) Figure 22, hidden switching cells in the generalized multilevel converter Fang Zheng Peng proposes to fully implement the generalized ML converter and to operate all of its components. This requires a lot of components and has operational consequences, as capacitors are dynamically paralleled and disconnected again. There may be relatively large currents flowing between capacitors to balance the voltages. The generalized multilevel converter contains a lot of redundancy that can be reduced by systematically removing redundant components. It has already been proposed by Fang Zheng Peng to reduce the structure to a MLDC or MC converter. However, the concept can be extended much further. The following graphs show that most popular ML topologies fit in the same framework. Note that series connected components without intermediate connection to other devices can be combined into single components. This is not done in the graphs throughout this document to illustrate the required voltage rating for switches and capacitors; the voltage rating is proportional to the number of series connected components. The topologies presented in Figure 23 exhibit the two basic concepts used in ML converters: 1. Generation of levels by multilevel voltage supply with a selector circuit (MLDC and FS, full semiconductor converter) 2. Generation of levels by using a single voltage source with series connected switched capacitors (MC) Both solutions need to control multiple capacitor voltages, assuming the MLDC has a single supply with a capacitive voltage divider. The control problem is quite different. Whereas the MC capacitors can be balanced quite easily also for a high number of levels and under all operating conditions, the MLDC has quite restrictive operating conditions and not all combinations of
20 ML Converter Topologies modulation depth and load angle can be used [21]. The full semiconductor converter in Figure 23 (c) has the same functionality as the MLDC, as it only provides a voltage selector. However, it has a wider selection of possible current paths and can operate with more optimized commutations, reducing over voltages and switching losses. The FS converter can also serve as starting point for new converter topologies as presented in [5]. (a) (b) (c) Figure 23, 5-L converter structures: multilevel diode clamped converter (MLDC), multi-cell converter (MC) or flying capacitor converter, full semiconductor (FS) converter 3.5 State of the art ML topologies The two basic concepts can be combined in alternate converter structures. A multiple supply input can be combined with subsequent flying capacitor stages or vice versa. The following paragraphs present topologies according to the state of the art, fitting in the generic frame, but introduced earlier. 3.5.1 SMC (Stacked Multi Cell Converter) The SMC has been introduced in 2000 [13, 15]. It uses a multilevel supply voltage; each of the capacitors in the supply has its own MC converter. Those converters are essentially stacked on top of each other as shown in Figure 24, hence the name SMC. The SMC makes use of switching cells and contains a lot of redundancy. This redundancy can be used to improve the control of the mid points in the split DC link supply. This is true namely for the neutral point voltage in the case of the 3-level supplied SMC, as is shown in chapter 1. Figure 24 does not reveal the fact that the two MC converters cannot be stacked directly as shown. The extension of possible output voltages leads to new blocking voltage requirements. Each of the switches in the upper rail and lower rail requires twice the blocking voltage of the simple MC converter. This can be seen much better when using the generic representation in triangle form (Figure 25). This converter is essentially the same as the one in Figure 24, with the only difference that it reveals required switch and capacitor voltages. It also uses an NPC output switching cell (instead of SMC), which uses less active switches.
Page 1 and 2: THÈSE En vue de l'obtention du DOC
Page 3: Acknowledgements i ACKNOWLEDGEMENTS
Page 6 and 7: iv Table of Contents 3.4 Generic ML
Page 8 and 9: vi Table of Contents 7.1 General mo
Page 10 and 11: viii Résumé français (French sum
Page 12 and 13: x Résumé français (French summar
Page 14 and 15: xii Résumé français (French summ
Page 16 and 17: xiv Résumé français (French summ
Page 18 and 19: xvi Résumé français (French summ
Page 20 and 21: xviii Résumé français (French su
Page 22 and 23: Introduction 1 2 INTRODUCTION This
Page 24 and 25: Introduction 3 tighter capacitor di
Page 26 and 27: Introduction 5 TABLE 1, OPERATING R
Page 28 and 29: Introduction 7 2.3 Glossary Note th
Page 30 and 31: Introduction 9 2.4 Nomenclature Not
Page 32 and 33: Introduction 11 DPC DSP DTC FC FPGA
Page 34 and 35: ML Converter Topologies 13 3 ML CON
Page 36 and 37: ML Converter Topologies 15 The four
Page 38 and 39: ML Converter Topologies 17 Each swi
Page 42 and 43: ML Converter Topologies 21 plus (a)
Page 44 and 45: ML Converter Topologies 23 N >= 2,
Page 46 and 47: ML Converter Topologies 25 (a) (b)
Page 48 and 49: ML Converter Topologies 27 (a) (b)
Page 50 and 51: ML Converter Topologies 29 In a pra
Page 52 and 53: ML Converter Topologies 31 reality,
Page 54 and 55: ML Converter Topologies 33 All cons
Page 56 and 57: ML Converter Topologies 35 TABLE 16
Page 58 and 59: ML Converter Topologies 37 TABLE 17
Page 60 and 61: ML Converter Topologies 39 3.7.4.1
Page 62 and 63: ML Converter Topologies 41 f C sw =
Page 64 and 65: ML Converter Topologies 43 A second
Page 66 and 67: ML Converter Topologies 45 Limitati
Page 68 and 69: ML Converter Topologies 47 1 K M 2
Page 70: ML Converter Topologies 49 3.8 Exec
Page 73 and 74: 52 3-L DC Link ML Converter Propert
Page 91 and 92:
70 3-L DC Link ML Converter Propert
Page 93 and 94:
Page 95 and 96:
Page 97 and 98:
Page 99 and 100:
Page 101 and 102:
Page 103 and 104:
Page 105 and 106:
Page 107 and 108:
Page 110 and 111:
NP Control with Carrier based PWM 8
Page 112 and 113:
Page 114 and 115:
Page 116 and 117:
Page 118 and 119:
Page 120 and 121:
Page 122 and 123:
Page 124 and 125:
Page 126 and 127:
Page 128 and 129:
Page 130 and 131:
Page 132 and 133:
Page 134 and 135:
Page 136 and 137:
Page 138 and 139:
Page 140 and 141:
Page 142 and 143:
Page 144 and 145:
NP Control with Optimal Sequence SV
Page 146 and 147:
Page 148 and 149:
Page 150 and 151:
Page 152 and 153:
Page 154 and 155:
Page 156 and 157:
Page 158 and 159:
Page 160 and 161:
Page 162 and 163:
Page 164 and 165:
Page 166 and 167:
Page 168 and 169:
Page 170 and 171:
Application and Verification 149 7
Page 172 and 173:
Application and Verification 151 TA
Page 174 and 175:
Application and Verification 153 Th
Page 176 and 177:
Application and Verification 155 7.
Page 178 and 179:
Page 180 and 181:
Page 182 and 183:
Page 184 and 185:
Page 186 and 187:
Page 188:
Page 191 and 192:
170 Conclusions and Outlook 8.1.2 M
Page 193 and 194:
172 Conclusions and Outlook 8.2 Out
Page 195 and 196:
174 Conclusions and Outlook 8.3 Sum
Page 197 and 198:
176 Appendix I = 1− ) (99) ( C 2
Page 199 and 200:
178 Appendix TABLE 78, FLYING CAPAC
Page 201 and 202:
180 Appendix 9.3 Single phase NP cu
Page 203 and 204:
182 Appendix 9.4 States of the ANPC
Page 205 and 206:
184 Appendix 9.5 NP currents as a f
Page 207 and 208:
186 Appendix 9.5.3 Maximum and mini
Page 209 and 210:
188 Appendix 9.6 NP current functio
Page 211 and 212:
190 Appendix TABLE 91, NP CURRENT I
Page 213 and 214:
192 Appendix TABLE 93, NP CURRENT I
Page 216 and 217:
Bibliography 195 10 BIBLIOGRAPHY [1
Page 218 and 219:
Bibliography 197 [33] P. Steimer,
Page 220 and 221:
Bibliography 199 neutral point bala
Page 222 and 223:
Bibliography 201 [88] J. Pou, J. Za
show all

Christoph Haederli - Les thÃ¨ses en ligne de l'INP - Institut National ...

Create successful ePaper yourself

Delete template?

Save as template?