Christoph Haederli - Les thèses en ligne de l'INP - Institut National ...
Christoph Haederli - Les thèses en ligne de l'INP - Institut National ...
Christoph Haederli - Les thèses en ligne de l'INP - Institut National ...
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
Introduction 3<br />
tighter capacitor dim<strong>en</strong>sioning in the <strong>de</strong>sign phase. Charging and discharging of flying capacitors<br />
may also be achieved with non-redundant states. This approach may lead to operating limitations,<br />
but it can also be used systematically for new control schemes.<br />
2.1.3 Synthesis and analysis of new NP control schemes (chapters 5 and 6)<br />
ML converters need to control both internal and external quantities. External quantities like<br />
output curr<strong>en</strong>t, machine torque etc. can be controlled by appropriate modulation and feedback<br />
control schemes. Such methods are application specific and are not treated in this thesis. On the<br />
other hand, the control of internal quantities is very topology specific and requires topology specific<br />
control schemes, which is the focus of this part of the thesis. Examples of internal quantities are<br />
not only capacitor voltages in the DC link or flying capacitors but also inclu<strong>de</strong> optimization<br />
objectives like semiconductor losses (overall losses or loss distribution) or curr<strong>en</strong>t THD in the<br />
capacitors. Control also has an impact on the <strong>de</strong>sign of ML converters, e.g. on capacitor<br />
dim<strong>en</strong>sioning or required semiconductor blocking voltage.<br />
The control issues <strong>de</strong>alt with in this thesis have a strong focus on NP control in 3-L DC link<br />
ML converters. Chapter 5 introduces new NP control schemes with CB (carrier based) PWM (pulse<br />
width modulation); chapter 6 introduces new NP control schemes based on SVM (space vector<br />
modulation).<br />
2.1.4 Application and experim<strong>en</strong>tal verification (chapter 7)<br />
Selected findings throughout the thesis have be<strong>en</strong> experim<strong>en</strong>tally verified. The most important<br />
topologies and control schemes have be<strong>en</strong> tested with low power prototypes. Experim<strong>en</strong>tal<br />
verification of the proposed concepts is important as simulation is not likely to capture all aspects<br />
of a real world system. The following issues oft<strong>en</strong> differ betwe<strong>en</strong> simulation and hardware<br />
implem<strong>en</strong>tation:<br />
- Delays in the control loop including curr<strong>en</strong>t s<strong>en</strong>sing and gate drivers<br />
- A/D and D/A conversion, <strong>de</strong>lays, noise, and resolution<br />
- G<strong>en</strong>eral disturbances and <strong>en</strong>vironm<strong>en</strong>tal noise<br />
- Algorithm execution times in the CPU and FPGA<br />
It is not obvious that more complex control algorithms can run on a giv<strong>en</strong> control platform,<br />
especially in the case of algorithms requiring significant calculation time. Only prototyping can<br />
prove feasibility of the implem<strong>en</strong>tation. Experim<strong>en</strong>tal verification of the new control schemes is<br />
partially covered in chapters 5 and 6 where the basic waveforms are shown. Chapter 7 relates the<br />
ML topologies and the control schemes to specific operating conditions. This chapter also<br />
proposes a combination of several differ<strong>en</strong>t control schemes introduced in this thesis within a<br />
hysteresis controller. Experim<strong>en</strong>tal verification in various operating conditions <strong>de</strong>monstrates the<br />
performance of the NP control schemes.