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3-L DC Link ML Converter Properties 71 art, which are making use of the NP current – voltage characteristics can also be used for any of the proposed split DC-link topologies. This finding is rather important, as the published concepts are numerous and they can both be used as basis for the further development of control schemes and for the basic understanding of the ML converter properties. The standard NP current function common for all 3-L DC link converters can be expressed as: i = ( 1− abs( s)) * (45) NP i out With the average switching function s from -1 to 1. Alternatively, the per phase duty cycle α L can be used resulting in: i = ( 1− abs(2α −1)) * i (46) NP L out 4.7 NP current in multiphase systems The findings from the previous paragraph on single phase leg properties can be used for the investigation of multi phase systems. The NP currents in function of the voltage in single phase legs (45) and (46) combine into characteristic NP currents in function of the CM voltage for a given DM output voltage. Based on the basic NP current functions, an analysis of the NP current spectrum can be made. Specifically, the DC NP current term relevant for NP voltage control can be determined in function of line currents and converter switching functions. 4.7.1 NP current in function of CM 4.7.1.1 H-bridge In an H-bridge configuration, a single phase output voltage is created by connecting a load between two single phase legs. The output voltage is proportional to the difference of the two average switching functions s a and s b . The two currents sum up to zero, as there is one single current loop. U U = sDM (47) 2 2 DC DC u out uout _ a − uout _ b = *( sa − sb) = * i out _ a = −i (48) out _ b i NP a = i ((1 − abs( s )) − (1 − abs( s ))) = i * ( abs( s ) − abs( s )) (49) out _ a * a b out _ a s ≤ * s (50) a 0 ∧ sb ≤ 0 → iNP = iout _ a *( sa − sb) = iout _ a s ≥ * s (51) a 0 ∧ sb ≥ 0 → iNP = iout _ a * ( sb − sa ) = −iout _ a s ≥ * 2* s (52) a 0 ∧ sb ≤ 0 → iNP = −iout _ a *( sb + sa ) = −iout _ a s ≤ * 2* s (53) 0 ∧ sb ≥ 0 → iNP = iout _ a *( sb + sa ) = iout _ a DM DM CM b CM a
72 3-L DC Link ML Converter Properties The two phase legs can be operated with zero common mode (opposing output voltage ratios: r 1 = – r 2) to obtain symmetry; the resulting NP current is zero. If the two output voltage ratios have different signs, both gradients have the same sign and the resulting NP current is a linear function of the CM voltage. If both output voltage ratios have the same signs, the two gradients have opposing signs, so that the gradient of the sum of the two functions is zero. The total NP current is then defined by the DM voltage alone. The resulting function of the NP current in function of the CM voltage is a piecewise linear function as shown in Figure 59 b). This function is always monotonic but can go into saturation. A good control scheme for the NP current should take this into account and limit the CM voltage to the area, where there is an impact on the NP current. NP current NP current 1 1 0 -1 I-NP / I-out1 0 I-NP1 / I-out1 1 s 0 -1 0 I-NP1 / I-out1 1 s I-NP2 / I-out1 I-NP2 / I-out1 -1 (a) -1 (b) 4.7.1.2 Three phase system Figure 59, NP current range with H-bridge In a typical three phase converter system, there are three phase legs sharing one common DC link. The load is not grounded in most application, which means there is no path for a CM current, the sum of the output currents is zero: i i + i 0 (54) out1 + out2 out3 = The neutral point current is the sum of the three individual NP currents: i i NPtot NPtot = i (1 − abs( s )) + i *(1 − abs( s )) + i *(1 − abs( )) (55) out1 * 1 out 2 2 out3 s3 = i − i abs( s ) + i − i * abs( s ) + i − i * abs( ) (56) out1 out1 * 1 out 2 out 2 2 out3 out 3 s3 i NPtot ( out1 1 out 2 2 + out3 s3 = − i * abs( s ) + i * abs( s ) i * abs( )) (57)
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THÈSE En vue de l'obtention du DOC
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Acknowledgements i ACKNOWLEDGEMENTS
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iv Table of Contents 3.4 Generic ML
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vi Table of Contents 7.1 General mo
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viii Résumé français (French sum
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x Résumé français (French summar
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xii Résumé français (French summ
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xiv Résumé français (French summ
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xvi Résumé français (French summ
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xviii Résumé français (French su
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Introduction 1 2 INTRODUCTION This
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Introduction 3 tighter capacitor di
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Introduction 5 TABLE 1, OPERATING R
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Introduction 7 2.3 Glossary Note th
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Introduction 9 2.4 Nomenclature Not
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Introduction 11 DPC DSP DTC FC FPGA
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ML Converter Topologies 13 3 ML CON
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ML Converter Topologies 15 The four
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ML Converter Topologies 17 Each swi
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ML Converter Topologies 19 size doe
Page 42 and 43: ML Converter Topologies 21 plus (a)
Page 44 and 45: ML Converter Topologies 23 N >= 2,
Page 46 and 47: ML Converter Topologies 25 (a) (b)
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Page 58 and 59: ML Converter Topologies 37 TABLE 17
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NP Control with Carrier based PWM 1
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NP Control with Optimal Sequence SV
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Application and Verification 149 7
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Application and Verification 151 TA
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Application and Verification 153 Th
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Application and Verification 155 7.
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170 Conclusions and Outlook 8.1.2 M
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172 Conclusions and Outlook 8.2 Out
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174 Conclusions and Outlook 8.3 Sum
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176 Appendix I = 1− ) (99) ( C 2
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178 Appendix TABLE 78, FLYING CAPAC
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180 Appendix 9.3 Single phase NP cu
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182 Appendix 9.4 States of the ANPC
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184 Appendix 9.5 NP currents as a f
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186 Appendix 9.5.3 Maximum and mini
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188 Appendix 9.6 NP current functio
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190 Appendix TABLE 91, NP CURRENT I
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192 Appendix TABLE 93, NP CURRENT I
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Bibliography 195 10 BIBLIOGRAPHY [1
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Bibliography 197 [33] P. Steimer,
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Bibliography 199 neutral point bala
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Bibliography 201 [88] J. Pou, J. Za
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