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Application and Verification 155 7.2.2 Motor drives There are at least two fundamentally differing motor control approaches: 1. Direct control of motor quantities by direct application of suitable states. No classical pulse width modulation as such is used, but of course the resulting pulse pattern essentially also is PWM signal. DTC is ABB’s preferred approach to motor control. None of the presented NP control schemes can be applied directly to DTC. However, DTC does automatically make use of the full physically controllable range based on the real time NP current function if a proper state selection for NP control is done. This is not true for the modified and virtual vectors. An application of such a combination of states would be pure coincidence. New NP control schemes for DTC can be defined by simply including modified and virtual vectors in the set of possible output vectors. The timing of the partner states of a virtual vector would be tricky as the overall application time of any vector is not known beforehand. DTC can also be tuned to have constant switching frequency (e.g. [108]). Yet other approaches would be required to make use of virtual vector in this case. There is also research work on the implementation of DTC based on MPC done (e.g. [52]). MPC will automatically make use of state combinations like the virtual vectors if the prediction horizon is long enough. However, this is computationally very demanding and has not been presented so far. 2. Vector control schemes or U/f control schemes make use of an approximated output voltage of the converter. Classical modulation schemes can be used for that purpose (SVM, carrier based). Consequently, all of the proposed modulation and NP control schemes are applicable to this kind of motor control. Motor drives generally have less stringent requirements regarding output waveform harmonics. But in any case, a low distortion is beneficial to keep losses in the machine low, reduce torque ripple and avoid mechanical oscillations in the system. Bearing degradation due to bearing currents is an important topic in drive systems. A lot can be done by proper bearing design. On the other hand it is clear that low average CM voltage and low CM transients are always beneficial for the drive system. Some of the proposed schemes (e.g. 6 th harmonic injection) perform better than others (e.g. virtual vector scheme) in that respects. A hysteresis based control approach can provide both a lot of NP control capacity and low CM voltage operation in steady state. 7.2.3 Back to back configurations Back to back refers to the connection of two or more converters of the same type to the same DC link. This may be a drive system with active front end, a power generation system with line inverter, a power quality device with multiple connections (e.g. UPFC), a multi-drive system with several motor inverters on the same DC link, etc. NP control in all these systems can either be dedicated to one inverter or shared by several. In the case of sharing the control task, different concepts are possible: Master slave concepts can be use, where one controller is taking care of the task using multiple inverters. Multiple controllers can also work independently, but in this case care has to be taken with stability of the control loops, as multiple controllers may counteract. Regardless of the different possibilities of approaching the control problem, physical limitations do
156 Application and Verification not change do the back to back topology. The real time NP current function is still valid for the individual inverters and virtual vectors may still be generated on the level of individual converters. All concepts proposed in the frame of this thesis still may be applied. The sharing of the control task has not been investigated in the frame of this thesis. Lee proposes a coupled controller to improve performance [79]. Pou has mad an analysis of the limits of zero NP current operation for back to back system [109]. With a suitable choice of nominal and worst case AFE operating point, this range can be significantly increased even if the load inverter is operating at high modulation depth and large load angle. The analysis has been done for the 3-L NPC with a NTV SVM, but the concept could be extended to a higher number of levels and different modulator types, which could be the subject of future research. 7.2.4 Single phase applications Single phase systems cannot make use of any of the proposed NP control schemes. However, NP control is relatively straight forward as shown in paragraph 4.7.1.1. The NP current can always be positive or negative independently of modulation depth or load angle. Single phase applications include for example railway applications, which are usually DC or single phase AC supplied. A particularly important feature of such applications is that reactive power can not be circulated between phases like in multiphase systems and as a result, there is a second harmonic fluctuation in the DC link voltage. This has a significant impact on the dimensioning and control of the DC link capacitors. The required DC link capacitance is typically very large to ensure a maximum voltage ripple. An alternate DC link capacitor control approach has been investigated in the frame of this thesis (documented in [2]): In reactive power compensation applications, the DC link capacitor is allowed to discharge in every half cycle to a very low voltage. This reduces the required capacitive energy and has a positive impact on losses and output voltage THD. The concept can also be extended to ML topologies. In spite of the inherently good capacitor controllability in single phase systems, the variable DC link operation in ML converters is not straight forward. There are conflicting targets regarding FC dimensioning and control. Flying capacitors should be relatively large to minimize the voltage ripple at the switching frequence; on the other hand they should be small to allow for a dynamic variation of the reference voltage. A indepth investigation of this topic has not been done in the frame of this thesis. For more information on the proposed variable DC link approach, the reader is referred to [2, 3].
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THÈSE En vue de l'obtention du DOC
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Acknowledgements i ACKNOWLEDGEMENTS
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iv Table of Contents 3.4 Generic ML
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vi Table of Contents 7.1 General mo
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viii Résumé français (French sum
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xviii Résumé français (French su
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Introduction 1 2 INTRODUCTION This
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Introduction 3 tighter capacitor di
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Introduction 5 TABLE 1, OPERATING R
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Introduction 7 2.3 Glossary Note th
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Introduction 9 2.4 Nomenclature Not
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Introduction 11 DPC DSP DTC FC FPGA
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ML Converter Topologies 13 3 ML CON
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ML Converter Topologies 15 The four
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ML Converter Topologies 17 Each swi
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ML Converter Topologies 19 size doe
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ML Converter Topologies 21 plus (a)
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ML Converter Topologies 23 N >= 2,
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ML Converter Topologies 25 (a) (b)
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ML Converter Topologies 27 (a) (b)
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ML Converter Topologies 29 In a pra
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ML Converter Topologies 31 reality,
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ML Converter Topologies 33 All cons
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ML Converter Topologies 37 TABLE 17
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ML Converter Topologies 39 3.7.4.1
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ML Converter Topologies 41 f C sw =
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ML Converter Topologies 43 A second
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ML Converter Topologies 45 Limitati
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ML Converter Topologies 47 1 K M 2
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Page 191 and 192: 170 Conclusions and Outlook 8.1.2 M
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Page 222 and 223: Bibliography 201 [88] J. Pou, J. Za
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