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Appendix 185 9.5.2 Zero average NP current areas for SMC and ANPC3 TABLE 86, ZERO AVERAGE NP CURRENT AREAS IN SYMMETRICAL 3 PHASE SYSTEMS MAKING USE OF DIFFERENT MODULATION TYPES AND CM VOLTAGE Condition Standard modulation SMC A modulation SMC B modulation Std. and A combined All types combined cos(ϕ)=1 cos(ϕ)=0.81 (inductive) cos(ϕ)=0 (inductive) - left of bold line: zero current possible - right of bold line: zero NP current not possible - dotted line: physical operation limit - Axes definition applies to all of TABLE 85 and TABLE 87. m = 2/sqrt(3) for maximum sinusoidal phase to phase output voltage.
186 Appendix 9.5.3 Maximum and minimum currents for the ANPC1 TABLE 87, NP CURRENT LIMITS (MIN AND MAX) IN SYMMETRICAL 3 PHASE SYSTEMS MAKING USE OF DIFFERENT MODULATION TYPES . THE ANGLE INDICATES POSITION OF THE VOLTAGE VECTOR IN THE FIRST TWO SEGMENTS IN THE αβ-FRAME (0 TO 2π/3) Condition Unconstrained DC CM injection Real time NP current function Modified and virtual vectors cos(ϕ)=1 I NP-min i θ m cos(ϕ)=1 I NP-max ϕ = 1.3 cos(ϕ)=0.27 (inductive) I NP-min ϕ = 1.3 cos(ϕ)=0.27 (inductive) I NP-max ϕ = 1.56 cos(ϕ)=0.01 (inductive) I NP-min ϕ = 1.56 cos(ϕ)=0.01 (inductive) I NP-max
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THÈSE En vue de l'obtention du DOC
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Acknowledgements i ACKNOWLEDGEMENTS
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iv Table of Contents 3.4 Generic ML
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vi Table of Contents 7.1 General mo
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viii Résumé français (French sum
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x Résumé français (French summar
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xiv Résumé français (French summ
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xviii Résumé français (French su
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Introduction 1 2 INTRODUCTION This
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Introduction 3 tighter capacitor di
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Introduction 5 TABLE 1, OPERATING R
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Introduction 7 2.3 Glossary Note th
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Introduction 9 2.4 Nomenclature Not
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Introduction 11 DPC DSP DTC FC FPGA
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ML Converter Topologies 13 3 ML CON
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ML Converter Topologies 15 The four
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ML Converter Topologies 17 Each swi
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ML Converter Topologies 19 size doe
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ML Converter Topologies 21 plus (a)
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ML Converter Topologies 23 N >= 2,
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ML Converter Topologies 25 (a) (b)
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ML Converter Topologies 27 (a) (b)
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ML Converter Topologies 29 In a pra
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ML Converter Topologies 31 reality,
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ML Converter Topologies 33 All cons
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ML Converter Topologies 35 TABLE 16
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ML Converter Topologies 37 TABLE 17
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ML Converter Topologies 39 3.7.4.1
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ML Converter Topologies 41 f C sw =
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ML Converter Topologies 43 A second
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ML Converter Topologies 45 Limitati
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ML Converter Topologies 47 1 K M 2
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ML Converter Topologies 49 3.8 Exec
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52 3-L DC Link ML Converter Propert
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NP Control with Carrier based PWM 8
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NP Control with Optimal Sequence SV
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Page 170 and 171: Application and Verification 149 7
Page 172 and 173: Application and Verification 151 TA
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Page 188: Application and Verification 167 7.
Page 191 and 192: 170 Conclusions and Outlook 8.1.2 M
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Page 195 and 196: 174 Conclusions and Outlook 8.3 Sum
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Page 211 and 212: 190 Appendix TABLE 91, NP CURRENT I
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Page 216 and 217: Bibliography 195 10 BIBLIOGRAPHY [1
Page 218 and 219: Bibliography 197 [33] P. Steimer,
Page 220 and 221: Bibliography 199 neutral point bala
Page 222 and 223: Bibliography 201 [88] J. Pou, J. Za
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