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ML Converter Topologies 29 In a practical implementation, the three series connected switches in the outer path do not need to be individual switches, but can be combined into one or two switches with higher blocking capability. If one device with high blocking capability is used and one with low blocking capability, the one with high blocking capability can be operated at fundamental frequency and only the switch with low blocking capability is used for the high frequency modulation. 3.7 Topology comparison The comparison of topologies is very application specific. The required operating range in modulation depth and load angle ϕ, the converter voltage and power level, the type of switching device, and the capacitor technology to be used all have a significant impact on any topology benchmarking for a specific application. However, in a generic approach, these parameters are not defined. A thorough comparison for a specific application is a big task on its own, as has been done for example in [32]. A limitation to a set of generic criteria is therefore used in this chapter for a basic topology comparison. TABLE 8, CRITERIA USED FOR THE TOPOLOGY COMPARISON Operating range regarding mod index and cos(ϕ) Total blocking voltage of active switches and minimum number of active switches Total blocking voltage of diodes and minimum number of diodes - Without considering disturbances - Including scaling laws - Including scaling laws Number of parallel current paths - Including impact on maximum duty cycle and peak current in any given device Loss distribution - Qualitative statements on inherent loss distribution and feasibility to control it Number of input voltage levels - Generated by series connected capacitors Number of flying capacitors - Including scaling laws Total energy of flying capacitors - Based on different operational limitations - Peak switching frequency limitation - Average switching frequency limitation - Given apparent output switching frequency Modularity - Feasibility of building blocks - Number of switches with different blocking voltage - Number of capacitors with different operating voltage It is impossible to include all possible variations of ML converters in the comparison. Only converters with single supply (at least per phase) are considered, as other converters like cascaded
30 ML Converter Topologies H-bridge converters with multiple supplies require a totally different supply scheme with different transformer configurations. TABLE 9 list the specific topologies included in this comparison: TABLE 9, TOPOLOGIES INCLUDED IN COMPARISON Single DC link voltage based Split DC link with any number of midpoints - MC (Multi Cell) converter, Figure 23 (b) - MLDC (Multi Level Diode Clamped) converter, Figure 23 (a) - SMC (Stacked Multi Cell) converter, Figure 25, refers to 3-L DC link based converters with two stacked MC converters only; high number of stacked MC converters is not considered in the following evaluation 3-L DC link topologies - ANPC 1 (Active Neutral Point Clamped) converter type 1, Figure 26 (b), includes the variation with backward half bridge according to Figure 31 (a) - ANPC 2, Figure 26 (c), includes the variations with different capacitor and switch arrangement according to Figure 31 (b) to (e) - ANPC 3, Figure 26 (d) Topologies according to [5] with combinations of FS, SC and FC stages Cascaded structures with single supply - FSx + FCx - FC2*(N/2) + … + FC2, (FC2*x used as abbreviation in tables) - M 2 LC 3.7.1 Operating range and number of devices TABLE 10, OPERATING RANGE OF DIFFERENT ML CONVERTERS MLDC MC SMC ANPC 1, ANPC 2, ANPC 3, FSx+FCx FC2 * x M 2 LC SCx+FCx FCx+SCx FCx+FCx m*cos(ϕ) all all all all all all m*cos(ϕ) all < 0.5 Note 1 < 0.5 Note 1: may be reduced to m*cos(ϕ) < 0.5 if all available states are used TABLE 10 indicates the minimum feasible operating ranges for the considered topologies. All topologies up to 3 input supply voltages can operate at all modulation indices and all cos(ϕ). Starting from 4 levels, the only guaranteed operating range is below m*cos(ϕ) = 0.5 (see [21]). In
Page 1 and 2: THÈSE En vue de l'obtention du DOC
Page 3: Acknowledgements i ACKNOWLEDGEMENTS
Page 6 and 7: iv Table of Contents 3.4 Generic ML
Page 8 and 9: vi Table of Contents 7.1 General mo
Page 10 and 11: viii Résumé français (French sum
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Page 22 and 23: Introduction 1 2 INTRODUCTION This
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Page 26 and 27: Introduction 5 TABLE 1, OPERATING R
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Page 30 and 31: Introduction 9 2.4 Nomenclature Not
Page 32 and 33: Introduction 11 DPC DSP DTC FC FPGA
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Page 58 and 59: ML Converter Topologies 37 TABLE 17
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NP Control with Carrier based PWM 8
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Application and Verification 149 7
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Application and Verification 155 7.
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176 Appendix I = 1− ) (99) ( C 2
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178 Appendix TABLE 78, FLYING CAPAC
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180 Appendix 9.3 Single phase NP cu
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182 Appendix 9.4 States of the ANPC
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184 Appendix 9.5 NP currents as a f
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186 Appendix 9.5.3 Maximum and mini
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188 Appendix 9.6 NP current functio
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190 Appendix TABLE 91, NP CURRENT I
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192 Appendix TABLE 93, NP CURRENT I
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Bibliography 195 10 BIBLIOGRAPHY [1
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Bibliography 197 [33] P. Steimer,
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Bibliography 199 neutral point bala
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Bibliography 201 [88] J. Pou, J. Za
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Christoph Haederli - Les thÃ¨ses en ligne de l'INP - Institut National ...

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