AMBA Design Kit Technical Reference Manual - ARM Information ...

AHB ComponentsBits Name Function[31:1] Reserved -Table 3-24 lists the register bit assignments.Table 3-24 ICPROTECTION Register bit assignments[0] Protection Enables or disables protected register access.When enabled, only privileged mode accesses, reads and writes, can access the interrupt controllerregisters.When disabled, both User mode and privileged mode can access the registers.This register is cleared on reset, and can only be accessed in privileged mode.NoteIf the bus master cannot generate accurate protection information, leave this register inits reset state to enable User mode access.Bits Name FunctionVector Address RegisterThe ICVECTADDR register is read/write. It contains the Interrupt Service Routine(ISR) address of the currently active interrupt. Table 3-25 lists the register bitassignments.Table 3-25 ICVECTADDR Register bit assignments[31:0] VectorAddr Contains the address of the currently active ISR. Any writes to this register clear the interrupt.Reading from this register provides the address of the ISR, and indicates to the priorityhardware that the interrupt is being serviced. Writing to this register indicates to thepriority hardware that the interrupt has been serviced. You must use the register asfollows:• the ISR reads the ICVectAddr register when an IRQ interrupt is generated• at the end of the ISR, the ICVectAddr register is written to, to update the priorityhardware.Reading or writing to the register at other times can cause incorrect operation.ARM DDI 0243C Copyright © 2003, 2007 ARM Limited. All rights reserved. 3-75