AMBA Design Kit Technical Reference Manual - ARM Information ...

AHB Components• If the Bus Matrix switches between input ports while in the middle of anundefined length burst, the input stage modifies the HTRANS and HBURSTsignals for the interrupted input port, so that when it is reinstated, the remainingtransfers in the burst meet the AHB specification.Decode stageThe decode-stage generates the select signal for individual slaves. It also handles themultiplexing of response signals and read data. During the address phase of a transfer,the decoder asserts the slave-select signal for the appropriate output stagecorresponding to the address of the transfer. In addition the decoder routes an Activesignal from the output stage back to the input stage. This signal indicates to the inputthat its address is currently being driven onto the chosen slave. During the data phase ofa transfer the decoder routes the response signals and Read data back to the input port.Each slave port, connected to an AHB master, is associated with a separate decoder.This enables the AHB masters to have independent address maps, that is a shared slavedoes not require to appear in the same address location for all masters. This is typicallyuseful for multi-processor systems.Any gaps in the memory map are redirected to a default slave, which returns an OKAYor ERROR response depending upon the type of access. There is an instance of a defaultslave associated with each decoder.The decoder stage also supports the system address Remap function. A 4-bit Remapcontrol signal connects to the decoder. Remapping might be used to change the addressof physical memory or a device after the application has started executing. This istypically done to permit RAM to replace ROM when the initialization has beencompleted.In multi-layer AHB systems that have local slaves on some of the AHB layers, theaddress decoding is performed in two stages. The first address decoder selects betweenlocal slaves and the shared slaves available through the AHB BusMatrix module. Tosupport this, the decode-stage within the BusMatrix includes an HSEL input thatindicates if the address from an input port is destined for a shared slave.Output stageThe output stage has the following functions:• selects the address and control signals from the input stages• selects the corresponding write data from the input stage• determines when to switch between input ports in the input stage.3-28 Copyright © 2003, 2007 ARM Limited. All rights reserved. ARM DDI 0243C