AMBA Design Kit Technical Reference Manual - ARM Information ...

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AHB Components• 64-bit to 32-bit funnel on page 3-93.3-2 Copyright © 2003, 2007 ARM Limited. All rights reserved. ARM DDI 0243C
AHB Components3.1 Reset controllerThe reset controller, ResetCntl, generates the system reset signal from an external resetinput. This module is based on a state machine that is used to detect the external resetbeing asserted, and is used to generate the system reset output. Figure 3-1 shows thereset controller module block diagram.Reset controller moduleExternal resetsynchronizationWDOGRESnoutput driverState machineHRESETnoutput driverFigure 3-1 Reset controller module components3.1.1 Signal descriptionsTable 3-1 lists the non-AMBA signals used by the reset controller.Signal Type Direction DescriptionHRESETn System reset Output The system reset output.Table 3-1 Reset controller signalsnPOReset Power-on reset Input Power-on reset input. This active LOW signal causes a cold reset whenLOW. Can be asserted asynchronously to HCLK. The source of thenPOReset signal is implementation-dependent.WDOGRES Watchdog reset Input The watchdog clock domain reset input.WDOGRESn Watchdog reset Output The watchdog clock domain reset output.ARM DDI 0243C Copyright © 2003, 2007 ARM Limited. All rights reserved. 3-3
Page 1 and 2: AMBA Design KitRevision: r3p0Techni
Page 3 and 4: ContentsAMBA Design Kit Technical R
Page 5 and 6: List of TablesAMBA Design Kit Techn
Page 7 and 8: List of TablesTable 4-23 WDOGPERIPH
Page 9 and 10: List of FiguresAMBA Design Kit Tech
Page 11 and 12: List of FiguresFigure 4-24 PrimeCel
Page 13 and 14: PrefaceThis preface introduces the
Page 15 and 16: PrefaceAppendix A AHB-Lite Overview
Page 17 and 18: PrefaceNumberingThe numbering conve
Page 19 and 20: Chapter 1IntroductionThis chapter d
Page 21 and 22: Introduction1.2 AMBA signalsThis se
Page 23 and 24: IntroductionSignalDirectionSlave Ma
Page 25 and 26: Introduction1.3 Product revisionsTh
Page 27 and 28: Chapter 2Functional OverviewThis ch
Page 29 and 30: Functional Overview2.2 ADK componen
Page 32 and 33: Functional OverviewPrimeCell Genera
Page 34 and 35: Functional Overview• MuxS2M• Re
Page 36 and 37: Functional Overview• AHB2:— EgM
Page 38 and 39: Functional Overview• Decoder• M
Page 40 and 41: Functional OverviewAddressNormal me
Page 44 and 45: AHB Components3.2 ArbiterThe AMBA b
Page 46 and 47: AHB Components3.2.2 Signal descript
Page 48 and 49: AHB Components3.4 Master-to-slave m
Page 50 and 51: AHB Components3.6 Example retry sla
Page 52 and 53: AHB Components3.7.1 SMI programmer
Page 54 and 55: AHB ComponentsTest vector typesThe
Page 56 and 57: AHB ComponentsThe address increment
Page 58 and 59: AHB ComponentsTable 3-7 Signal desc
Page 60 and 61: AHB Components3.8 Bus matrixThis se
Page 62 and 63: AHB ComponentsThe two products are
Page 64 and 65: AHB Components Figure 3-8 BusMatrix
Page 66 and 67: AHB ComponentsNoteWhen connecting t
Page 68 and 69: AHB Components• If the Bus Matrix
Page 70 and 71: AHB ComponentsINCR bursts are treat
Page 72 and 73: AHB ComponentsFigure 3-11 on page 3
Page 74 and 75: AHB Components3.8.10 Signal descrip
Page 76 and 77: AHB ComponentsTable 3-8 Bus Matrix
Page 78 and 79: AHB ComponentsAddress0xFFFFFFFF0xF0
Page 80 and 81: AHB Components3.10 APB bridgeThe AH
Page 82 and 83: AHB Components3.10.2 AhbToAPB bridg
Page 84 and 85: AHB Components3.11 Example bus mast
Page 86 and 87: AHB ComponentsConfigurable optionsT
Page 88 and 89: AHB ComponentsAhb2Ahb (1:1)This is
Page 90 and 91: AHB ComponentsTrial synthesis of th
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AHB ComponentsAHB1AHBdecoder 1A[31:
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AHB Componentsconfirmation of compl
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AHB ComponentsMaster cancelspending
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AHB ComponentsSignal AHB bus Direct
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AHB Components3.13 Asynchronous AHB
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AHB ComponentsTable 3-13 Asynchrono
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AHB ComponentsTable 3-13 Asynchrono
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AHB ComponentsSlave responsesLocked
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AHB ComponentsThe nonvectored and d
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AHB Components7. Clear the interrup
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AHB ComponentsBits Name FunctionIRQ
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AHB ComponentsBits Name FunctionSof
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AHB ComponentsDefault Vector Addres
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AHB ComponentsTable 3-30 lists the
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AHB ComponentsPeripheral Identifica
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AHB ComponentsPrimeCell Identificat
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AHB ComponentsSignal Type Direction
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AHB ComponentsDownsizer transfersTh
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AHB ComponentsUnsupported transfers
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AHB ComponentsTable 3-43 Signal map
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AHB ComponentsInstead of reading HR
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AHB ComponentsThe funnel can only f
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AHB Components3-96 Copyright © 200
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APB Components4.1 Remap and pause c
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APB ComponentsReset Status Clear Re
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APB ComponentsPeripheral Identifica
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APB ComponentsPrimeCell Identificat
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APB ComponentsThe functionality of
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APB Components4.3 Peripheral to bri
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APB Components4.4.1 Programmer’s
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APB ComponentsWatchdog Raw Interrup
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APB ComponentsWatchdog Integration
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APB ComponentsNoteWhen you design a
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APB ComponentsThe four, 8-bit Prime
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APB Components4.5 Dual input timerT
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APB Componentsbackground load value
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APB Components• TIMCLKENx is tied
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APB ComponentsCurrent Value Registe
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APB ComponentsTable 4-31 lists the
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APB ComponentsTable 4-34 lists the
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APB ComponentsPeripheral Identifica
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APB ComponentsPrimeCell Identificat
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APB Components4-40 Copyright © 200
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Behavioral Models5.1 External RAM,T
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Behavioral Models5.2 Internal memor
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Behavioral Models5.3 External ROMTh
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Behavioral Models5.5 AHB file reade
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Behavioral ModelsThe following AHB-
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Behavioral ModelsIf HREADY is asser
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Behavioral ModelsCycle n Cycle n+1C
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Behavioral ModelsCycle 1 Cycle 2Com
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Behavioral ModelsThis sequence perf
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Behavioral ModelsTable 5-7 Stimulus
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Behavioral ModelsField Default Valu
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Behavioral ModelsInput stimulusfile
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Behavioral ModelsEndiannessThe prep
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Behavioral ModelsTable 5-13 fm2conv
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Behavioral ModelsTable 5-16 Numberi
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Behavioral Models5.6 Test interface
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Behavioral Models5.6.2 User-defined
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PrimeCell GPIO6.1 OperationThe Prim
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PrimeCell GPIO6-4 Copyright © 2003
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AHB-Lite OverviewA.1 About AHB-Lite
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AHB-Lite OverviewTable A-1 AHB-Lite
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AHB-Lite OverviewA.3 AHB-Lite slave
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GlossaryAdvanced Peripheral Bus (AP
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Glossaryaddresses cause accesses to
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GlossaryGlossary-6 Copyright © 200
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