AMBA Design Kit Technical Reference Manual - ARM Information ...

AHB ComponentsThe funnel can only function correctly if the 64-bit AHB master does not issue transfersof 64-bit to the 32-bit slave. For 32-bit accesses or accesses at smaller width, the correctword of the data bus is routed to the 32-bit slave. You must use the downsizer moduleif the transfers cannot be guaranteed to be 32-bit or less. See 64-bit to 32-bit downsizeron page 3-85.Funnel selected and accessing even word addressIn the address phase of a transfer, the funnel stores bit [2] of the address bus, HADDR.During data phase, the stored HADDR2S, Haddrs2Delayed, determines the side of theHWDATA that must be routed to the 32-bit bus. HWDATA[31:0] is selected for evenword addresses and HWDATA[63:32] for even word addresses.For read transfers, the HRDATAM signal is routed to both HRDATAS[31:0] andHRDATA[63:32] and read by the 64-bit bus master.EndiannessThe funnel supports little-endian and word-invariant big-endian systems. It can be usedin full big-endian mode by reversing the polarity of the HWDATA multiplexor.3.17.2 Signal descriptionsSignal Direction DescriptionThe funnel has two AHB ports. The 64-bit AHB port is a slave interface and uses an Ssuffix. The 32-bit AHB port has an M suffix. Table 3-45 lists the signal connections forthe funnel module.HCLK Input System bus clock. Logic is triggered on the clock rising edge.HRESETn Input Activate low asynchronous reset.Signals connected to 64-bit AHBHADDR2S Input Address bit 2 from 64-bit AHB.HRDATAS[63:0] Output Read data to 64-bit bus.Table 3-45 Funnel interface signalsHREADYS Input HREADY signal on the 64-bit AHB bus, indicating start and end of transfer on the64-bit bus.HWDATAS[63:0] Input Write data from 64-bit bus.3-94 Copyright © 2003, 2007 ARM Limited. All rights reserved. ARM DDI 0243C