AMBA Design Kit Technical Reference Manual - ARM Information ...

APB ComponentsReading from this register returns the same value returned from TIMERXLOAD. SeeLoad Register on page 4-29 for more details.Integration Test Control RegisterThe TIMERITCR Register is read/write. It is a single-bit register that enablesintegration test mode. When in this mode, the masked interrupt outputs are directlycontrolled by the Integration Test Output Set Register. The combined interrupt outputTIMINTC then becomes the logical OR of the bits set in the Integration Test Output SetRegister. Figure 4-21 shows the register bit assignments.31 1 0UndefinedIntegration Test Mode EnableTable 4-33 lists the register bit assignments.Figure 4-21 TIMERITCR Register bit assignmentsTable 4-33 TIMERITCR Register bit assignmentsBits Name Function[31:1] - Reserved, read undefined, must read as zeros[0] Integration Test Mode Enable When set HIGH, places the Timers into integration test modeIntegration Test Output Set RegisterWhen in integration test mode, the enabled interrupt outputs are driven directly from thevalues in this write-only register, TIMERITOP. Figure 4-22 shows the register bitassignments.31 2 1 0UndefinedIntegration Test TIMINT2 valueIntegration Test TIMINT1 valueFigure 4-22 TIMERITOP Register bit assignmentsARM DDI 0243C Copyright © 2003, 2007 ARM Limited. All rights reserved. 4-33