Abstracts Brochure - CERN

TUPCH191
TUPCH192
TUPCH193
TUPCH194
27-Jun-06 16:00 - 18:00 TUPCH — Poster Session
Considerations for the Choice of the Intermediate Frequency and Sampling Rate for Digital
RF Control
S. Simrock, A. Brandt, M. Hoffmann, W. Kriens, F. Ludwig (DESY)
M.K. Grecki, T. Jezynski (TUL-DMCS)
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Modern FPGA-based rf control systems employ
digital field detectors where an intermediate
frequency (IF) in the range of 10 to
more than 100 MHz is sampled with a syn-
chronized clock. Present ADC technology with 14-16 bit resolution allows for maximum sampling rates up to 250
MHz. While higher IF’s increase the sensitivity to clock jitter, lower IF frequencies are more susceptible to electromagnetic
noise. The choice of intermediate frequency and sampling rate should minimize the overall detector noise,
provide high measurement bandwidth and low latency in field detection, and support algorithms for optimal field
estimation.
First Results of the Low Level RF Control System for the Diamond Storage Ring
A.V. Watkins, M. Jensen, M. Maddock, S.A. Pande, S. Rains, D.
Spink (Diamond) B. A. Aminov (CRE) M. Pekeler (ACCEL)
Diamond has chosen an advanced analogue
IQ Low Level RF (LLRF) for each of its storage
ring superconducting cavities. It has been
designed by ACCEL to the DLS specification
and comprises two vector loops: one controlling the amplitude and phase of the cavity voltage and the other
controlling the cavity frequency. The design utilises integrated IQ modulators and incorporates an error amplifier
with adjustable gain and bandwidth. Control is via VME crate, with EPICS software. We present measurements of
the LLRF regulation from the acceptance tests and following commissioning.
Low Level RF Control System Modules for J-PARC RCS
A. Schnase, M. Nomura, F. Tamura, M. Yamamoto (JAEA/J-PARC)
S. Anami, E. Ezura, K. Hara, C. Ohmori, A. Takagi, M. Yoshii (KEK)
After completing the design phase, the VME
modules for the Low Level RF Control
(LLRF) of the Rapid Cycling Synchrotron of
J-PARC are now in the production and de-
bugging phase. First all modules are tested for basic functionality, for example dual harmonic signal generation.
Then sets of modules are connected together to check higher-level functions and feedback. Finally, the LLRF modules
are interfaced to high voltage components like amplifiers and cavities. We present the results of these tests, the test
methods and test functions on several levels. This way we simulate beam operation working conditions and gain
experience in controlling all parameters.
Analogue and Digital Low Level RF for the ALBA Synchrotron
ALBA is a 3 GeV, 400 mA, 3rd generation
F. Pérez, H. Hassanzadegan, A. Salom (ALBA)
Synchrotron Light Source that is in the construction
phase in Cerdanyola, Spain. The
RF System will have to provide 3.6 MV of accelerating voltage and restore up to 540 kW of power to the electron beam.
Two LLRF prototypes are being developed in parallel, both following the IQ modulation/demodulation technique.
One is fully based on analogue technologies; the other is based on digital FPGA processing. The advantages of the