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<strong>eZ80</strong> <strong>CPU</strong><br />
User Manual<br />
106<br />
OUT0 (n), r<br />
Output Register to I/O Port<br />
Operation<br />
Description<br />
(0,n) ← r<br />
The n operand is placed on address bus (7:0) and address bus (23:8) is zero.<br />
The byte at the specified register is output to this I/O address.<br />
Condition Bits Affected<br />
None<br />
Mnemonic Operands ADL Mode Cycles Op Codes<br />
OUT0 (n),r X 4 ED, jj, nn<br />
jj = binary code 00 rrr 001 where rrr identifies the A, B, C, D, E, H, or L<br />
registers assembled as follows into the object code:<br />
Register<br />
rrr<br />
A 111<br />
B 000<br />
C 001<br />
D 010<br />
E 011<br />
H 100<br />
L 101<br />
UM007701-1100
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