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<strong>eZ80</strong> <strong>CPU</strong><br />
User Manual<br />
55<br />
INDMR<br />
Input and Decrement HL - Repeat<br />
Operation<br />
Description<br />
repeat:<br />
{ (HL) ← (0C)<br />
B ← B – 1<br />
C ← C – 1<br />
HL ← HL – 1<br />
} while B ≠ 0<br />
The contents of the C register are placed on address bus (7:0) and zero on<br />
address bus (23:8). The byte at this I/O address is read into the <strong>CPU</strong>. The<br />
contents of HL are placed on the address bus and the byte is written to the<br />
memory address specified by the HL register. The B, C, and HL registers are<br />
decremented. The instruction repeats until the B register equals zero.<br />
ADL mode affects operations with the HL register. ADL mode may be<br />
overridden with the .S or .L suffix.<br />
Condition Bits Affected<br />
S<br />
Z<br />
H<br />
P/V<br />
N<br />
C<br />
Not affected.<br />
Set.<br />
Not affected.<br />
Not affected.<br />
Set.<br />
Not affected.<br />
Mnemonic Operands ADL Mode Cycles Op Codes<br />
INDMR — X 5/3 ED, 9A<br />
INDMR.S — 1 6/3 52, ED, 9A<br />
INDMR.L — 0 6/3 49, ED, 9A<br />
UM007701-1100