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<strong>eZ80</strong> <strong>CPU</strong><br />
User Manual<br />
34<br />
DAA<br />
Decimal Adjust Accumulator<br />
Operation<br />
––<br />
Description<br />
Operation<br />
This instruction conditionally adjusts the Accumulator for BCD addition and<br />
subtraction operations. For addition (ADD, ADC, INC) or subtraction (SUB,<br />
SBC, DEC, NEG), the following table indicates the operation performed.<br />
Condition Bits Affected<br />
Hex Value<br />
in Upper<br />
Digit<br />
(Bits 7-4)<br />
Hex Value<br />
in Lower<br />
Digit<br />
(Bits 3-0)<br />
Number<br />
Added to<br />
Byte<br />
C Before<br />
DAA<br />
H Before<br />
DAA<br />
0 0-9 0 0-9 00 0<br />
0 0-8 0 A-F 06 0<br />
0 0-9 1 0-3 06 0<br />
ADD 0 A-F 0 0-9 60 1<br />
ADC 0 9-F 0 A-F 66 1<br />
INC 0 A-F 1 0-3 66 1<br />
1 0-2 0 0-9 60 1<br />
1 0-2 0 A-F 66 1<br />
1 0-3 1 0-3 66 1<br />
SUB 0 0-9 0 0-9 00 0<br />
SBC 0 0-8 1 6-F FA 0<br />
DEC 1 7-F 0 0-9 A0 1<br />
NEG 1 6-F 1 6-F 9A 1<br />
C After<br />
DAA<br />
S Set if the MSB of the Accumulator is 1 after the operation; reset<br />
otherwise.<br />
Z Set if result is zero; reset otherwise.<br />
H See instruction.<br />
P/V Set if the Accumulator is even parity after the operation; reset otherwise.<br />
N Not affected.<br />
C See instruction.<br />
Mnemonic Operands ADL Mode Cycles Op Codes<br />
DAA — X 1 27<br />
UM007701-1100
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