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<strong>eZ80</strong> <strong>CPU</strong><br />
User Manual<br />
63<br />
JP (rr)<br />
Jump Indirect<br />
Operation<br />
Description<br />
If .S<br />
ADL ← 0<br />
else if .L<br />
ADL ← 1<br />
If ADL=1<br />
PC[23:0] ← rr[23:0]<br />
else<br />
PC[15:0] ← rr[15:0]<br />
PC[23:16] ← 0<br />
The program counter is loaded with the contents of the specified register.<br />
ADL Prefix Operation<br />
0 None Load a 2-byte logical address from the register into PC.<br />
Keep ADL cleared to 0.<br />
1 None Load a 3-byte logical address from the register into PC.<br />
Keep ADL set to 1.<br />
X .L16 Clear ADL.<br />
Load a 3-byte logical address from the register into PC.<br />
X .S15 Set ADL to 1.<br />
Load a 2-byte logical address from the register into PC.<br />
Condition Bits Affected<br />
None<br />
Mnemonic Operands ADL Mode Cycles Op Codes<br />
0<br />
JP (HL) 1 3 E9<br />
JP.S15 (HL) X 4 40, E9<br />
JP.L16 (HL) X 4 5B, E9<br />
0<br />
JP (IX) 1 4 DD, E9<br />
JP.S15 (IX) X 5 40, DD, E9<br />
JP.L16 (IX) X 5 5B, DD, E9<br />
0<br />
JP (IY) 1 4 FD, E9<br />
JP.S15 (IY) X 5 40, FD, E9<br />
JP.L16 (IY) X 5 5B, FD, E9<br />
UM007701-1100
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