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eZ80 CPU - writeframeofmind.biz

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<strong>eZ80</strong> <strong>CPU</strong><br />

User Manual<br />

47<br />

IN r, (C)<br />

Input I/O Port to Register<br />

Operation<br />

Description<br />

r ← (C)<br />

The contents of BC (15:0) are placed on address bus (15:0) and zero on<br />

address bus (23:16). The byte at this I/O address is loaded into the specified<br />

register.<br />

Condition Bits Affected<br />

S<br />

Z<br />

H<br />

P/V<br />

N<br />

C<br />

Set if Bit 7 is 1; reset otherwise.<br />

Set if byte is 0; reset otherwise.<br />

Reset.<br />

Set if parity is even; reset otherwise.<br />

Reset.<br />

Not affected.<br />

Mnemonic Operands ADL Mode Cycles Op Codes<br />

IN (C) ind 3 ED, jj<br />

jj = binary code 01 rrr 000 where rrr identifies the A, B, C, D, E, H, or L<br />

register assembled as follows into the object code.<br />

Register<br />

rrr<br />

A 111<br />

B 000<br />

C 001<br />

D 010<br />

E 011<br />

H 100<br />

L 101<br />

UM007701-1100

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