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eZ80 CPU - writeframeofmind.biz

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<strong>eZ80</strong> <strong>CPU</strong><br />

User Manual<br />

114<br />

RET<br />

Return from Subroutine<br />

Operation<br />

Description<br />

PC ← (SP)<br />

ADL Prefix Operation<br />

0 None Pop 2-byte logical return address using SPS mapped by MBASE into PC.<br />

Keep ADL cleared to 0.<br />

1 None Pop 3-byte return address using SPL into PC.<br />

Keep ADL set to 1.<br />

0 .S or .L Pop a byte using SPL and load its units bit into ADL.<br />

— If ADL is still cleared to 0, pop a 2-byte logical return address using SPS<br />

mapped by MBASE into PC.<br />

—If ADL is now set to 1, pop a byte from SPL into PC (23-16). Then pop two<br />

bytes from SPS mapped by MBASE into PC (15-0).<br />

1 .S or .L Pop a byte using SPL and load its units bit into ADL.<br />

—If ADL is now cleared to 0, pop a 2-byte logical address from SPL into PC.<br />

—If ADL is still set to 1, pop a 3-byte address from SPL into PC.<br />

Condition Bits Affected<br />

None<br />

Mnemonic Operands ADL Mode Cycles Op Codes<br />

RET — 0/1 * C9<br />

RET.S — 0 * 40, C9<br />

RET.S — 1 * 52, C9<br />

RET.L — 0 * 49, C9<br />

RET.L — 1 * 5B, C9<br />

UM007701-1100

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