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<strong>eZ80</strong> <strong>CPU</strong><br />
User Manual<br />
71<br />
LD A, (pp)<br />
Load<br />
Operation<br />
Description<br />
A ← (pp)<br />
The pp operand is any of BC, DE, HL, IX+d, or IY+d. The contents of the<br />
memory location specified by the contents of the specified register are loaded<br />
into the Accumulator.<br />
ADL mode affects operations with the BC, DE, HL, IX, or IY register. ADL mode<br />
may be overridden with the .S or .L suffix.<br />
Condition Bits Affected<br />
None<br />
Mnemonic Operands ADL Mode Cycles Op Codes<br />
LD A,(BC) X 2 0A<br />
LD.S A,(BC) 1 3 52, 0A<br />
LD.L A,(BC) 0 3 49, 0A<br />
LD A,(DE) X 2 1A<br />
LD.S A,(DE) 1 3 52, 1A<br />
LD.L A,(DE) 0 3 49, 1A<br />
LD A,(HL) X — 7E<br />
LD.S A,(HL) 1 — 52, 7E<br />
LD.L A,(HL) 0 — 40, 7E<br />
LD A,(IX+d) X — DD, 7E, dd<br />
LD.S A,(IX+d) 1 — 52, DD, 7E, dd<br />
LD.L A,(IX+d) 0 — 49, DD, 7E, dd<br />
LD A,(IX+d) X 2 FD, 7E, dd<br />
LD.S A,(IX+d) 1 3 52, FD, 7E, dd<br />
LD.L A,(IX+d) 0 3 49, FD, 7E, dd<br />
UM007701-1100
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