eZ80 CPU - writeframeofmind.biz

eZ80 CPU
User Manual
7
I/O Space
A separate I/O space may include both on- and off-chip peripheral devices. The
eZ80 features a 64K I/O space with 16-bit addresses.
Memory
The eZ80 provides three address generation modes—Native Z80, Virtual Z80
and ADL mode.
Native Z80 Mode
The total memory address space is the first 64KB of the overall eZ80 memory
space. The Memory Base (MBASE) register is zero.
Virtual Z80 Mode
ADL Mode
Addressing Modes
The memory address space can be any 64KB in the overall 16MB eZ80
memory space under the control of the MBASE register.
The eZ80 operates in a 16MB linear address space. In this mode, the 16-bit PC,
BC, DE, HL, IX, and IY registers expand to 24 bits. The processor automatically
fetches an additional byte of address or immediate data in those instructions
that contain a 16-bit address or data in other modes. Prefix-override bytes allow
any instruction to operate in ADL mode in one of the first two modes or to use
MBASE addressing in ADL mode.
Memory addresses can be formed in several ways. The eZ80 addressing
modes include:
• Immediate—In this mode of addressing, the byte(s) following the Op Code
in memory contains the actual operand. When the immediate operand is
larger than eight bits, the low-order byte is next after the Op Code byte
followed by the high-ordered bytes.
• Modified Page Zero—The eZ80 has a special single byte CALL instruction
to any of the eight locations in page zero (the first 256 bytes) of memory.
These restart (RST) instructions set the PC to an effective address in page
zero.
UM007701-1100