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<strong>eZ80</strong> <strong>CPU</strong><br />
User Manual<br />
48<br />
IN0 r, (n)<br />
Input I/O Port to Register<br />
Operation<br />
Description<br />
adr[23:8] ← 0<br />
adr[7:0] ← n<br />
r ← (adr)<br />
The n operand is placed on address bus (7:0) and address bus (23:8) are zero.<br />
The byte at this I/O address is loaded into the specified register.<br />
Condition Bits Affected<br />
S<br />
Z<br />
H<br />
P/V<br />
N<br />
C<br />
Set if Bit 7 is 1; reset otherwise.<br />
Set if byte is 0; reset otherwise.<br />
Reset.<br />
Set if parity is even; reset otherwise.<br />
Reset.<br />
Not affected.<br />
Mnemonic Operands ADL Mode Cycles Op Codes<br />
IN0 r,(n) X 4 ED, jj, nn<br />
jj = binary code 00 rrr 000 where rrr identifies the A, B, C, D, E, H, or L<br />
register assembled as follows into the object code.<br />
Register<br />
rrr<br />
A 111<br />
B 000<br />
C 001<br />
D 010<br />
E 011<br />
H 100<br />
L 101<br />
UM007701-1100
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