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<strong>eZ80</strong> <strong>CPU</strong><br />
User Manual<br />
84<br />
LD r, (uu)<br />
Load<br />
Operation<br />
Description<br />
r ← (uu)<br />
The uu operand is any of HL, IX+d, or IY+d and the r operand is any of A, B, C,<br />
D, E, H, or L. The specified r register is loaded from the memory location<br />
specified by the multi-byte uu register.<br />
ADL mode affects operations with the HL, IX, or IY register. ADL mode may be<br />
overridden with the .S or .L suffix.<br />
Condition Bits Affected<br />
None<br />
Mnemonic Operands ADL Mode Cycles Op Codes<br />
LD r,(HL) X 3 kk<br />
LD.S r,(HL) 1 4 52, kk<br />
LD.L r,(HL) 0 4 49, kk<br />
LD r,(IX+d) X 4 DD, kk<br />
LD.S r,(IX+d) 1 5 52, DD, kk<br />
LD.L r,(IX+d) 0 5 49, DD, kk<br />
LD r,(IY+d) X 4 FD, kk<br />
LD.S r,(IY+d) 1 5 52, FD, kk<br />
LD.L r,(IY+d) 0 5 49, FD, kk<br />
kk = binary code 01 rrr 110 where rrr identifies the A, B, C, D, E, H, or L<br />
register assembled as follows in the object code:<br />
Register<br />
rrr<br />
A 111<br />
B 000<br />
C 001<br />
D 010<br />
E 011<br />
H 100<br />
L 101<br />
UM007701-1100
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