23.03.2015 Views

eZ80 CPU - writeframeofmind.biz

eZ80 CPU - writeframeofmind.biz

eZ80 CPU - writeframeofmind.biz

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

<strong>eZ80</strong> <strong>CPU</strong><br />

User Manual<br />

16<br />

For subtraction, overflow can occur for operands of unlike signs. Operands of<br />

like signs never causes overflow, as shown in the following example.<br />

+127 0111 1111 MINUEND<br />

(-) -64 1100 0000 SUBTRAHEND<br />

+191 1011 1111 DIFFERENCE<br />

The minuend sign has changed from positive to negative, giving an incorrect<br />

difference. Thus, overflow is set to 1. Another method for predicting an overflow<br />

is to observe the carry into and out of the sign bit. If there is a carry in and no<br />

carry out, then overflow has occurred. This flag is also used with logical<br />

operation and rotate instructions to indicate the parity of the result. The number<br />

of 1 bits in a byte are counted. If the total is odd, then odd parity (P=0) is<br />

flagged. If the total is even, then even parity (P=1) is flagged.<br />

During search instructions (CPI, CPIR, CPD, CPDR) and block transfer<br />

instructions (LDI, LDIR, LDD, LDDR), the P/V Flag monitors the state of the<br />

byte count register (BC). When decrementing, the byte counter results in a zero<br />

value and the flag is reset to 0; otherwise the flag is logic 1.<br />

During LD A, I and LD A, R instructions, the P/V Flag is set to 1 with the<br />

contents of the interrupt enable flip-flop (IEF2) for storage or testing. When<br />

inputting a byte from an I/O device, IN r,(C), the flag is adjusted to indicate the<br />

parity of the data.<br />

Half-Carry Flag<br />

The Half-Carry (H) Flag is set or reset, depending on the carry and borrow<br />

status between Bits 3 and 4 of an 8-bit arithmetic operation. This flag is used by<br />

the decimal adjust accumulator instruction (DAA) to correct the result of a<br />

packed BCD addition or subtraction. The H flag is set to 1 or reset to 0,<br />

according to the following table.<br />

H ADD SUBTRACT<br />

1 There is a carry from<br />

Bit 3 to Bit 4<br />

There is a borrow<br />

from Bit 4.<br />

0 There is no carry from<br />

Bit 3 to Bit 4<br />

There is no borrow<br />

from Bit 4.<br />

Zero Flag<br />

The Zero (Z) Flag is set to 1 or reset to 0 if the result generated by the execution<br />

of certain instructions is zero. For 8-bit arithmetic and logical operations, the Z<br />

Flag is set to 1 if the resulting byte in the Accumulator is 0. If the byte is not 0,<br />

the Z Flag is reset to 0.<br />

UM007701-1100

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!