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<strong>eZ80</strong> <strong>CPU</strong><br />
User Manual<br />
52<br />
IND2<br />
Input and Decrement HL<br />
Operation<br />
Description<br />
(HL) ← (C)<br />
B ← B – 1<br />
C ← C – 1<br />
HL ← HL – 1<br />
The contents of BC (15:0) are placed on address bus (15:0) and zero on<br />
address bus (23:16). The byte at this I/O address is read into the <strong>CPU</strong>. The<br />
contents of HL are then placed on the address bus and the byte is written to the<br />
memory address specified by the HL register. The B, C, and HL registers are<br />
decremented. The Z Flag is set to 1 if the B register decrements to zero.<br />
ADL mode affects operation with the HL register. ADL mode may be overridden<br />
with the .S or .L suffix.<br />
Condition Bits Affected<br />
S<br />
Z<br />
H<br />
P/V<br />
N<br />
C<br />
Not affected.<br />
Set if B-1 = 0; reset otherwise.<br />
Not affected.<br />
Not affected.<br />
Set.<br />
Not affected.<br />
Mnemonic Operands ADL Mode Cycles Op Codes<br />
IND2 — x 5 ED, 8C<br />
IND2.S — 1 6 52, ED, 8C<br />
IND2.L — 0 6 49, ED, 8C<br />
UM007701-1100
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