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<strong>eZ80</strong> <strong>CPU</strong><br />
User Manual<br />
67<br />
JR cc, d<br />
Conditional Jump Relative<br />
Operation<br />
Description<br />
If cc’ TRUE:<br />
PC ← PC + d<br />
If the condition is true, then the two’s-complement displacement d is added to<br />
the program counter. The jump is measured from the address of the byte<br />
following the instruction (JR Op Code +2).<br />
Condition Bits Affected<br />
None<br />
Mnemonic Operands ADL Mode Cycles Op Codes<br />
JR cc,d X 2/3 kk, dd<br />
kk = binary code 00 ccc 000 where ccc identifies one of status conditions<br />
assembled as follows into the object code.<br />
ccc Condition Relevant Flag<br />
100 NZ (non-zero) Z<br />
101 Z (zero) Z<br />
110 NC (non-carry) C<br />
111 C (carry) C<br />
UM007701-1100
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