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eZ80 CPU - writeframeofmind.biz

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<strong>eZ80</strong> <strong>CPU</strong><br />

User Manual<br />

25<br />

CALL cc, Mmn<br />

Conditional CALL Subroutine<br />

Operation<br />

Description<br />

If cc True:<br />

(SP) ← PC<br />

PC ← Mmn<br />

If condition cc is true, the return address, which follows this instruction, is<br />

pushed onto the stack and then the program counter is loaded with the Mmn<br />

operand and execution continues at the new PC address. The Mmn operand is<br />

a 16- or 24-bit address, depending on the instruction and/or the ADL mode. The<br />

low-order byte of the mn operand is the first byte after the Op Code.<br />

ADL Prefix Operation<br />

0 None Stack 2-byte logical return address using SPS mapped by MBASE.<br />

Keep ADL cleared to 0. Load a 2-byte logical address from the<br />

instruction into PC.<br />

1 None Stack 3-byte return address using SPL. Keep ADL set to 1. Load a<br />

3-byte logical address from the instruction into PC.<br />

0 .IS Stack 2-byte logical return address using SPS mapped by MBASE.<br />

Stack a 00 byte using SPL. Keep ADL cleared to 0. Load a 2-byte logical<br />

address from the instruction into PC.<br />

1 .IS Stack two LS bytes of the return address using SPS mapped by MBASE.<br />

Stack the MS byte of the return address using SPL. Stack a 01 byte<br />

using SPL. Clear ADL to 0. Load a 2-byte logical address from the<br />

instruction into PC.<br />

0 .IL Stack 2-byte logical return address using SPL. Stack a 00 byte using<br />

SPL. Set ADL to 1. Load a 3-byte address from the instruction into PC.<br />

1 .IL Stack 3-byte return address using SPL. Stack a 01 byte using SPL.<br />

Keep ADL set to 1. Load a 3-byte address from the instruction into PC.<br />

UM007701-1100

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