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Soft-Core Processor Design - CiteSeer

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Chapter 5<br />

Performance<br />

This chapter investigates the performance of the UT Nios implementation described in the<br />

previous chapter. First, the methodology used to measure the performance is described. Next, the<br />

effects of various architectural parameters on performance are investigated. Finally, a<br />

performance comparison of the UT Nios and 32-bit Altera Nios is presented. Although the<br />

emphasis is on the performance, the FPGA area requirements are also taken into consideration.<br />

5.1. Methodology<br />

5.1.1. UT Nios Benchmark Set<br />

To assess the performance of a computer architecture, a set of benchmark programs has to be<br />

defined. The benchmark set should be representative of the programs that are commonly run on<br />

the architecture. Hence, to define a good benchmark set, it is necessary to determine the<br />

characteristics of programs that are used in Nios-based systems. We refer to the benchmark set<br />

defined in this chapter as the UT Nios benchmark set.<br />

The Nios architecture is intended for use in FPGA-based systems. FPGAs are typically built<br />

into systems for two reasons: speeding up the performance of critical parts of an application, and<br />

system reconfigurability. Performance critical parts of the application are implemented in logic<br />

because such implementation does not incur overheads associated with the instruction fetching<br />

and decoding in a software implementation. For instance, DSP functions can be implemented<br />

efficiently in the DSP blocks of Stratix FPGA chips, while an equivalent implementation in<br />

software running on a general-purpose microprocessor incurs the overheads that limit the<br />

performance. Auxiliary functions, performing simple operations, are more likely to be<br />

implemented in software using a general-purpose microprocessor like Nios. They include<br />

functions such as simple data conversions or header processing in network applications. Using a<br />

soft-core processor, instead of mapping the whole application into hardware, results in better<br />

logic utilization [55]. Performance is still an issue, because the soft-core processor has to be able<br />

to handle the data at the same rate as the rest of the system.<br />

47

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