Soft-Core Processor Design - CiteSeer
Soft-Core Processor Design - CiteSeer
Soft-Core Processor Design - CiteSeer
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Chapter 2<br />
Background<br />
<strong>Soft</strong>-core processors are one aspect of the trend in architecture generally known as<br />
reconfigurable computing. Recent developments in FPGA technology made FPGAs a suitable<br />
target for processor implementations. FPGAs can be reprogrammed, so the processor parameters<br />
can be changed during the lifetime of the product, if the need arises. However, an FPGA<br />
implementation of a soft-core processor will typically provide lower performance than the<br />
corresponding ASIC design. In this chapter we give an overview of the related work, and put soft-<br />
core processors in the context of reconfigurable computing. We also review the FPGA technology<br />
and CAD flow for FPGAs.<br />
2.1. Related work<br />
The concept of reconfigurable computing has been in existence since the early 1960s [4].<br />
Reconfigurable computing systems use some form of programmable hardware to accelerate<br />
algorithm execution. Computation intensive parts of the algorithm are mapped to the<br />
programmable hardware, while the code that cannot be efficiently mapped is usually executed on<br />
a general-purpose processor. Depending on the proximity of programmable hardware to the<br />
general-purpose processor, a system is said to be closely or loosely coupled. In a closely coupled<br />
system, reconfigurable resources allow customization of the processor’s functional units. On the<br />
other end, reconfigurable hardware in a loosely coupled system can be a standalone network unit.<br />
Reconfigurable systems are usually categorized between these two extremes. There has been a lot<br />
of research in the area of reconfigurable computing. An extensive survey of reconfigurable<br />
systems can be found in [4].<br />
In reconfigurable systems, performance critical parts of the application are implemented in<br />
hardware. Since various systems tend to use common algorithms, many of the developed<br />
components can be reused. Reusable components come in the form of intellectual property (IP)<br />
cores. An IP core is a standard block of logic or data that can be used to build a larger or more<br />
complex system. IP cores are divided into three categories, depending on the level of<br />
optimization, and flexibility of reuse: soft cores, firm cores, and hard cores [5]. A soft core is<br />
usually a synthesizable HDL specification that can be retargeted to various semiconductor<br />
3