Soft-Core Processor Design - CiteSeer
Soft-Core Processor Design - CiteSeer
Soft-Core Processor Design - CiteSeer
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• QsortInt: uses the qsort algorithm to sort 100 integers. It is equivalent to the Qsort<br />
benchmark from the MiBench set. The only difference is the size of the dataset.<br />
The UT Nios benchmark set also includes some test benchmarks. Test benchmarks are<br />
sequences of assembler instructions that test the performance of specific architectural features. By<br />
analyzing how the performance of test benchmarks depends on various parameters, it is possible<br />
to get better insight into the performance of real applications. The test benchmarks are:<br />
• Loops: runs a tenfold nested loop with two addition operations inside the innermost<br />
loop, representing applications with many branches.<br />
• Memory: performs 20 consecutive addition/subtraction operations on elements of a<br />
one-dimensional array residing in the data memory, representing memory intensive<br />
applications.<br />
• Pipeline: performs a sequence of ADD, ADDI, MOV, and SUB instructions, where<br />
each instruction uses the result of the previous instruction. The benchmark tests the<br />
implementation of the data forwarding logic in the pipeline.<br />
• Pipeline-Memory: performs a sequence of pairs of LD and ADD instructions, where<br />
the ADD instruction uses the result of the LD. The benchmark tests how data<br />
forwarding of the operands coming from the memory is implemented. Two variants of<br />
this benchmark are used, performing the load operations from the program and data<br />
memory. Load instructions typically access the program memory to access the<br />
compiler generated data.<br />
The toy and test benchmarks are run multiple times in a loop to produce reasonable run times that<br />
can be measured.<br />
All benchmarks were compiled using gcc for Nios (version 2.9-nios-010801-20030227)<br />
included in the GNUPro toolkit, with the compiler optimization level 3. The time was measured<br />
using a timer peripheral provided in the SOPC component library. The timer peripheral provides<br />
a C library routine nr_timer_milliseconds(), which returns the number of milliseconds since the<br />
first call to this procedure. We measure the performance in milliseconds for all benchmarks,<br />
except for the Bitcount benchmark, whose performance is reported in bits/ms. The Bitcount<br />
benchmark randomly generates its input dataset, so its run time varies slightly depending on the<br />
system configuration.<br />
5.1.2. Development Tools<br />
The following set of cores and tools was used to obtain the results presented in this chapter.<br />
The Altera Nios 3.0 implementation of the Nios architecture was used to compare the<br />
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