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Developments in Ceramic Materials Research

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248<br />

Li Chen<br />

the back contact cathode electrode was formed, which def<strong>in</strong>es the pixel pitch <strong>in</strong> a vertical<br />

direction.<br />

The photo resist was stripped off <strong>in</strong> an acetone solution afterward. The ceramic samples<br />

were then loaded <strong>in</strong> a Plasma Enhanced Chemical Vapour Deposition (PECVD) system<br />

DP800 (Oxford Plasma Technology). The PECVD vacuum system was pumped down while<br />

the ceramic samples were be<strong>in</strong>g heated up. When a process base pressure was achieved and<br />

the chamber’s temperature was stabilised at 300°C, a 1.2 µm thick SiO2 th<strong>in</strong> film was<br />

deposited on the ceramic samples surface, us<strong>in</strong>g a gas mixture of SiH4 and N2O. After the<br />

vacuum chamber was cool<strong>in</strong>g down to room temperature, the system was vented with dry<br />

nitrogen. The ceramic samples were re-assembled back on three sample holders, and were<br />

loaded <strong>in</strong> the electron beam evaporation system. This time, the second layer of molybdenum<br />

<strong>in</strong> a thickness of 0.2 µm was deposited at an elevated temperature. This molybdenum layer<br />

would be used as the gate electrode, separated from the first molybdenum layer by the SiO2<br />

th<strong>in</strong> layer. This was followed by another photo lithography pattern<strong>in</strong>g us<strong>in</strong>g the mask aligner<br />

to def<strong>in</strong>e the molybdenum gate electrode tracks, which are perpendicular to the previously<br />

patterned back contact electrode tracks. The top gate electrode specifies the pixel pitch <strong>in</strong> the<br />

horizontal direction. Here, a wet etch<strong>in</strong>g solution was used to etch the molybdenum <strong>in</strong> the<br />

exposed pattern area on the top gate layer.<br />

After stripp<strong>in</strong>g off the photo resist, a new layer of photo resist was sp<strong>in</strong> coated on the<br />

ceramic samples. The photo resist was softly baked, ready for the follow<strong>in</strong>g critical<br />

lithography pattern<strong>in</strong>g, which def<strong>in</strong>es the gate hole arrays on the top molybdenum layer. The<br />

gate hole arrays should be def<strong>in</strong>ed symmetrically with<strong>in</strong> the gate electrode tracks overlapp<strong>in</strong>g<br />

the back contact cathode electrode. This was achieved through a photo lithography utiliz<strong>in</strong>g a<br />

GCA 8000 DSW Wafer Stepper. This photo lithography produced 1.5 µm <strong>in</strong> diameter<br />

aperture arrays <strong>in</strong> the photo resist. Figure 1 shows a high resolution Scann<strong>in</strong>g Electron<br />

Microscope (SEM) photograph of a cross section of a patterned hole <strong>in</strong> the photo resist.<br />

Figure 1. Cross section of a 1.5 µm <strong>in</strong> diameter hole def<strong>in</strong>ed <strong>in</strong> the photo resist. Stand<strong>in</strong>g wave caused<br />

ripples developed on the profile of photo resist sidewall.

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