Developments in Ceramic Materials Research

Field Emission Display on Ceramic 249
In order to control the dimension of gate apertures more precisely, instead of using wet
etching process, a Reactive Ion Etching (RIE) method was adopted to etch the top
molybdenum layer down to the SiO2 through the pattern holes in photo resist. A SF6 reaction
gas was used for this molybdenum dry etching process using a facility System 90 (Oxford
Plasma Technology), along with the patterned photo resist as a mask. Figure 2 shows a top
view of four gate aperture arrays in the gate electrode tracks in the vertical direction,
overlapping over the back contact electrode in the horizontal position.
To take the advantage of dry etching technique, which produces repeatable high quality
thin film through accurate process control, an anisotropic reactive ion etching recipe was
developed for etching the SiO2 dielectric between the two molybdenum layers through the
small openings of molybdenum gate holes. This SiO2 etching process was performed in a
system CME 800 (Oxford Plasma Technology), using the combination feeding gases of CHF3
and C2F6 to form cylinder shape cavities. Figure 3 illustrates a SEM image showing a cross
section of a cylinder cavity within the SiO2 after the dry etching process. These small cavities
were enlarged by removing more SiO2 through another wet etching process in a buffered HF
solution. This further etching process is aimed to clean any SiO2 residue left on the back
contact cathode molybdenum. It could cause a serious electrical conductive problem for the
molybdenum micro tips to be formed on the back contact electrode tracks if there were any
SiO2 residues left. Un-predicted field emission behaviour from the emitters would result when
the device is powered up. The photo resist was stripped off afterward. A SEM photograph
showing a cross section image of a SiO2 cavity after the buffered HF etching and photo resist
stripping is shown in Figure 4.
Figure 2. Top view of a gate hole arrays patterned on the intersection of gate electrode tracks and
cathode electrode tracks.