Agilent 34970A/34972A Data Acquisition / Switch Unit
Agilent 34970A/34972A Data Acquisition / Switch Unit
Agilent 34970A/34972A Data Acquisition / Switch Unit
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Chapter 5 Theory of Operation<br />
Floating Logic<br />
The main controller, U205, is a 16-bit microcontroller incorporating<br />
many built-in features:<br />
• A 10-bit, successive approximation ADC with selectable inputs is<br />
used to convert two signals: FLASH and FRQRNG. The FLASH<br />
signal is the residual charge on the main integrating ADC output<br />
from the internal DMM assembly (A4). The FRQRNG signal (also<br />
from the internal DMM) is used to make voltage ranging decisions for<br />
frequency and period measurements.<br />
• A pulse-width-modulation port, after filtering the 23 kHz output with<br />
R221,C224, and R259, produces DC voltages between 0V and 5V.<br />
This voltage, PREADJ, is used to adjust the precharge amplifier<br />
offset voltage in U101 on the internal DMM assembly (A4).<br />
• A full, UART controlled, serial port is used to communicate with the<br />
I/O processor through opto-isolators U303 and U214. <strong>Data</strong> is sent in<br />
an 11-bit frame at a rate of 187.5 kbits/second. The 11-bit frame is<br />
configured for one start bit, nine data bits, and one stop bit.<br />
4<br />
• A timer is used to measure the power line frequency on LSENSE.<br />
Frequencies between 55 Hz and 66 Hz result in the use of a 60 Hz<br />
standard for the DMM integration period. All other frequencies will<br />
result in the use of a 50 Hz standard.<br />
5<br />
• A 16-bit counter counts pulses on CNT to create, along with the 8-bit<br />
counter in U209, a 24-bit counter for the internal DMM.<br />
131