Agilent 34970A/34972A Data Acquisition / Switch Unit
Agilent 34970A/34972A Data Acquisition / Switch Unit
Agilent 34970A/34972A Data Acquisition / Switch Unit
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
Chapter 5 Theory of Operation<br />
Internal DMM<br />
The programmable capacitance is implemented by varying the signal<br />
level across a compensating capacitor. In the x0.2 configuration, low<br />
frequency gain is set by R301, R302, and R304. The variable gain<br />
element U302/U303 essentially varies the value of C306 from 0 to 1<br />
times its value in 256 steps. The exact gain constant is determined<br />
during the 50 kHz AC voltage range calibration procedure. In the x0.002<br />
configuration, low frequency gain is set by R301, R302, and R303. The<br />
variable gain element U302/U303 essentially varies the value of C305<br />
plus C306 from 0 to 1 times their value in 256 steps. The exact gain<br />
constant is determined during the 50 kHz AC voltage range calibration<br />
procedure.<br />
The second stage is made up of two amplifiers (U305 and U312) each<br />
configured for a fixed gain of x10. Overall 2nd stage gains of x1, x10, and<br />
x100 are produced by routing the 1st stage output either around, or<br />
through one or both amplifiers as shown in the table below.<br />
4<br />
2nd State Gain U306A U306B U306C U306D U304C<br />
x1<br />
x10<br />
x100<br />
ON<br />
OFF<br />
OFF<br />
OFF<br />
ON<br />
ON<br />
OFF<br />
OFF<br />
ON<br />
OFF<br />
ON<br />
OFF<br />
OFF<br />
OFF<br />
ON<br />
The output of the 2nd stage is connected to the rms-to-dc converter stage.<br />
Any residual DC offset from the amplifier stages is blocked by capacitor<br />
C316. Buffer U307 drives the input to the rms-to-dc converter as well as<br />
the frequency comparator (U310A) input. The rms-to-dc converter has<br />
two selectable averaging filters (C318 and C318 plus C321) for the<br />
analog computer circuit of U308. The two analog averaging filters<br />
together with digital filters running in the main CPU implement the<br />
three selectable AC filters: slow, medium, and fast. The faster analog<br />
filter (using C318) is used for all AC V, AC I, and frequency or period<br />
autoranging. The slower analog filter is used only with the slow and<br />
medium AC filter choices.<br />
In frequency or period measurements, U310A generates a logic signal<br />
(FREQIN) for every input zero crossing. The AC sections FREQRNG DC<br />
output is measured directly by the main CPU’s 10-bit ADC during<br />
frequency or period measurements. This lower resolution measurement<br />
is sufficient to perform voltage ranging decisions for these functions. The<br />
frequency comparator output is disabled during AC voltage and current<br />
measurements by U310B forcing U310A’s input to –15 volts.<br />
5<br />
145