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148 Y. Liu et al.
decreases, partial rollback occurs more frequently, and leading to the increasing
of speedup.
Fig. 5 shows the ratio of started transactions to committed transactions. A
transaction needs to be restarted when rollback occurs due to a conflict; therefore
this ratio reflects the frequency of rollbacks. The ratio value 1 indicates that there
is no rollback occurs, and a bigger value means more rollbacks.
As Fig. 5(a) shows, the ratio of flattening model increases rapidly with the
increasing of processors, while the ratio of CPR scheme increases slowly, this
is because that the conflict occurs more frequently when the processor number
increases, and compared to rolling back to the outermost transaction, CPR
rolls back partially whenever it is possible, therefore, the number of restarted
transactions for partial rollback is far fewer than rolling back to the outermost
transaction.
Fig. 5(b) gives relationship between the ratio and nesting levels. It shows that
the ratio of flattening model increases rapidly with the increasing of nesting
levels, while the ratio of CPR keeps stable and stays at a low level.
Two conclusions can be drawn from the above experiment results: firstly, CPR
scheme outperforms flattening model in performance and scalability, in other
words, with the increasing of processor number and nesting level, CPR scheme
achieves better performance than flattening model; secondly, the performance of
CPR scheme is correlative with the density of data sharing among nesting levels.
6 Conclusion
Transactional memory can improve programmability of multi-core processors,
avoid deadlock and furthermore, promote performance of concurrent programs.
However, it also faces a series of challenges including transaction nesting.
To support efficient closed nesting in hardware transactional memory, this paper
proposes a CPR scheme which support conditional partial rollback on conflict
without increasing hardware complexities significantly. Compared to the flattening
model which is commonly-used in hardware transactional memory, the CPR
scheme rolls back to the conflicted transaction itself or one of its outer-level
transactions instead of the outermost if given conditions are satisfied. Transactional
memory system architecture with support of the CPR scheme is also
proposed based on multi-core processor and current cache coherent mechanisms.
The system has been implemented by simulation. Its performance is evaluated
by seven benchmark applications. Evaluation results show that the CPR scheme
outperforms flattening model in performance and scalability.
References
1. Herlihy, M., Eliot, J., Moss, B.: Transactional memory: Architectural support for
lock-free data structures. In: 20th International Symposium on Computer Architecture,
pp. 289–300. IEEE Computer Society, San Diego (1993)