Intel® Server System Server System "Emerald Ridge ... - CTL

IPMI Command InterfaceIntel® Server System "Emerald Ridge” Integrated Baseboard Management Controller EPSCodeCommandNet Function = Intel General Application (0x2E2E), LUN = 00Request, Response Datacurrent platform CPU configuration= 0 – If T-states are disabled by the user.= 1.255 – Actual number of supported T-Statesby the lowest number processor.Note: other processors should match thenumber of throttling states of lowest numberprocessor.DescriptionByte 8 – Number of installed CPUs/socket. Thisvalue is calculated as a number of allCPUs/sockets present on the board duringplatform boot.Bytes 9:16 - Processor Discovery Data for thelowest number processor in LSByte-first order.Turbo power current Limit MSR 1ACh for thelowest number processor passed by BIOS.Bytes 17:24 - Processor Discovery Data 2 forthe lowest number processor in LSByte-firstorder. Platform Info MSR 0CEh for the lowestnumber processor passed by BIOS.Byte 25 - ICC_TDC reading from PECI for thelowest number processor. In a multiprocessorenvironment all the processors should havecommon ICC_TDC. Set to 0 if ICC_TDC ofprocessors don’t match and set the number ofallowed P-States to 0 as well. Set to 0 if thePECI is attached to ICH9 or if the SPSFirmware should query ICC_TDC using ‘OEMGet Reading’ with type “ICC_TDC reading fromPECI”ResponseByte 1 – completion code=00h – Success (Remaining standardcompletion codes are shown in Section 2.12)=81h – Invalid Domain Id=8Ah – P-State or T-State out of rangeByte 2:4 = Intel manufacturers ID – 0x000157,LS byte first118Intel ConfidentialRevision 1.1