IntelÃ‚Â® Server System Server System "Emerald Ridge ... - CTL

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錯誤 ! 尚未定義樣式。 EPSFunctional SpecificationBelow diagram represents SMBUS connections from BMCFigure 3. SMBUS Topology3.7 Watchdog TimerThe BMC implements a fully IPMI 2.0-compatible watchdog timer. See the Intelligent PlatformManagement Interface Specification Second Generation v2.0. The NMI / diagnostic interrupt foran IPMI 2.0 watchdog timer is associated with an NMI. A watchdog pre-timeout SMI orequivalent signal assertion is not supported.3.8 BMC Internal Timestamp ClockThe BMC maintains a four-byte internal timestamp clock. The timestamp value is derived froman RTC element that is internal to the BMC.This internal timestamp clock is read and set using the Get SEL Time and Set SEL Timecommands, respectively. The Get SDR Time command can also be used to read the timestampclock. These commands and the IPMI time format are specified in the Intelligent PlatformManagement Interface Specification Second Generation v2.0.3.8.1 BMC Clock InitializationDuring system initialization the BMC cannot guarantee the validity of its internal timestamp, so itresets its clock counter to zero. The BMC attempts to retrieve the current time from an internalRevision 1.1Intel ® Confidential 19
錯誤 ! 尚未定義樣式。錯誤 ! 尚未定義樣式。 EPSbattery-backed RTC element. If the RTC time is in the pre-init range of 0 to 0x20000000, thenthe BMC ignores it and continues counting from zero, and any SEL events have pre-inittimestamps relative to the approximate time of the BMC initialization.Whenever the BMC receives the Set SEL Time command, it updates the integrated RTC value.This helps ensure that the BMC internal clock maintains synchronization with the system clockacross BMC initializations. Using the Set SEL Time command to force the BMC to a pre-inittimestamp causes the RTC to be updated with the same value. Unless the Set SEL Timecommand is sent with a valid time before the next BMC initialization, the BMC ignores the preinittime stored in the RTC.3.8.2 <strong>System</strong> Clock SynchronizationThe BMC does not have direct access to the system clock used by BIOS and the operatingsystem. The BIOS must send the Set SEL Time command with the current system time to theBMC during system Power-on Self Test (POST). Synchronization during very early POST ispreferred, so any SEL entries recorded during system boot can be accurately time stamped.If the time is modified through an OS interface, then the BMC’s time is not synchronized until thenext system reboot.3.9 <strong>System</strong> Event Log (SEL)The BMC implements the system event log as specified in the Intelligent Platform ManagementInterface Specification, Version 2.0. The SEL is accessible regardless of the system power statevia the BMC's in-band and out-of-band interfaces. See Table 50 for more information on SELcommands.The BMC allocates 65,502 bytes (approx 64 KB) of non-volatile storage space to store systemevents. The SEL timestamps might not be in order. Up to 3,639 SEL records can be stored at atime. Any command that would result in an overflow of the SEL beyond the allocated space willbe rejected with an “Out of Space” IPMI completion code (C4h).3.9.1 Servicing EventsEvents can be received while the SEL is being cleared. The BMC implements an eventmessage queue to avoid the loss of messages. Up to three messages can be queued beforemessages are overwritten.The BMC recognizes duplicate event messages by comparing sequence numbers and themessage source. See the Intelligent Platform Management Interface Specification SecondGeneration v2.0. Duplicate event messages are discarded (filtered) by the BMC after they areread from the event message queue. The queue can contain duplicate messages.3.9.2 SEL Entry DeletionetionThe BMC does not support individual SEL entry deletion. The SEL may only be cleared as awhole.3.9.3 SEL ErasureSEL erasure is a background process. After initiating erasure with the Clear SEL command,additional Clear SEL commands must be executed to get the erasure status and determine20Intel ConfidentialRevision 1.1
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IntelÃ‚Â® Server System Server System "Emerald Ridge ... - CTL

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