IntelÃ‚Â® Server System Server System "Emerald Ridge ... - CTL

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Intel® Server System "Emerald Ridge” ” Integrated Baseboard Management Controller EPS 錯誤 ! 尚未定義樣式。With the Set BMC Global Enables command, the BMC can generate an interrupt requestingattention when setting the SMS_ATN bit in the status register.The SMS_ATN bit that is set indicates one or more of the following:There is at least one message in the BMC receive message queueAn event is in the event message buffer- Watchdog pre-timeout interrupt flag has been setAll conditions must be cleared and all BMC to SMS messages must be flushed for theSMS_ATN bit to be cleared.The host I/O address of the SMS interface is 0CA2h – 0CA3h.The operation of the SMS interface is described in the Intelligent Platform ManagementInterface Specification. See the chapter titled, “Keyboard Controller Style (KCS) Interface.”4.6.4.1 Canceling In-progress CommandsSoftware can cancel an in-progress transaction by issuing a new WRITE_START command tothe interface. However, there are cases where the BMC has accepted the command andqueued it up for execution. In these cases, the commands are executed even if the transactionhas been canceled.Since the SMS interface is single-threaded, the BMC does not accept a new command until thecurrent, canceled-in-progress command has completed execution. Until then, any newcommand sent via the SMS interface is responded to with a NODE_BUSY completion code.When the current, canceled-in-progress command is complete, the BMC discards the responseand the SMS interface accepts commands for execution.4.6.5 SMM InterfaceThe SMM interface is a KCS interface that is used by the BIOS when interface response time isa concern, for example with the BIOS SMI handler. The BMC gives this interface priority overother communication interfaces. The BMC has limits on how many back-to-back transactions itcan handle without loss in responsiveness. It must be able to handle up to 30 back-to-backcommands from the BIOS.The BMC implements the optional Get Status / Abort transaction on this interface. Only LUN 1 issupported on this interface. In addition, the status register OEM1/2 bits are defined as specifiedin Section 4.6.3.The event message buffer is shared across SMS and SMM interfaces.The host I/O address of the SMM interface is 0CA4h – 0CA5h.4.7 IPMB Communication InterfaceThe IPMB communication interface uses the 100 KB/s version of an I 2 C bus as its physicalmedium. For more information on I 2 C specifications, see The I 2 C Bus and How to Use It. TheIPMB implementation in the BMC is compliant with the IPMB v1.0, revision 1.0.Revision 1.1Intel ® Confidential 61
錯誤 ! 尚未定義樣式。Intel® Server System "Emerald Ridge” Integrated Baseboard Management Controller EPSThe BMC IPMB slave address is 20h.The BMC both sends and receives IPMB messages over the IPMB interface. Non-IPMBmessages received via the IPMB interface are discarded.Messages sent by the BMC can either be originated by the BMC, such as initialization agentoperation, or by another source. One example is KCS-IPMB bridging.For IPMB request messages originated by the BMC, the BMC implements a response timeoutinterval of 60 ms and a retry count of 3.4.7.1 BMC as I 2 C Master Controller on IPMBThe BMC allows access to devices on the IPMB as an I 2 C master. The following commands aresupported:Send Message: This command writes data to an I 2 C device as master.Master Write-Read: This command allows the following actions:- Writing data to an I2C device as a master.- Reading data from an I2C device as a master.- Writing data to I2C device as a master, issue an I2C Repeated Start, and reading aspecified number of bytes from I2C device as a master. Errors in I2C transmission orreception are communicated via completion codes in the command response.These functions support the most common operations for an I 2 C master controller. This includesaccess to common non-intelligent I 2 C devices like SEEPROMs. The Send Message commandis used to send IPMB messages to intelligent devices that use the IPMB protocol.4.7.2 IPMB LUN RoutingThe BMC can receive either request or response IPMB messages. The treatment of thesemessages depends on the destination logical unit number (LUN) in the IPMB message. ForIPMB request messages, the destination LUN is the responder’s LUN. For IPMB responsemessages, the destination LUN is the requester’s LUN. The disposition of these messages isdescribed in Table 29. The BMC accepts LUN 00b and LUN 10b.IPMB messages can be up to 36 bytes, including IPMB header and checksums.Table 29. BMC IPMB LUN RoutingLUNNameMessage Disposition00b BMC Request messages with this LUN are:Passed to the BMC command handler for execution.Compared with outstanding BMC originated requests. If there is a match, the BMC sub-systemthat sent the request is notified. Otherwise the message is discarded.01b Reserved Messages arriving with this LUN are discarded.10b SMS All messages arriving with this destination LUN are placed in the Receive Message Queue. Ifthat buffer is full, the message is discarded. No further action is completed.11b Reserved Messages arriving with this LUN are discarded.62Intel ConfidentialRevision 1.1
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IntelÃ‚Â® Server System Server System "Emerald Ridge ... - CTL

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